Forum Discussion
From your stp, the mem read addr is 0x14000040 which seems not the device bar addr 0x40000004. Please check this.
Regards,
Rong
- Serge938 months ago
Occasional Contributor
Hello Rong,
In that case everything in my Header has to be revert, not only the address...
Can you confirm me the mapping of the Header which is not very clear in the ug20316 page 73-74.
R-Tile is configured with the ' PCIe Header format' enabled :
Can you confirm me the mapping to use with the following signals :
st0_hdr(31:0) <= 01000040h – Memory write 32-Bits command=40h, Length=(7:0)=01h => 1DW
st0_hdr(63:32) <= 0Fh & 000PORT_TAG_NB(5:0) & 0000h - TAG, LAST_BE=0h, First_BE=Fh, Requester_ID=0h
st0_hdr(95:64) <= (BASE_ADD_EP + 14h) – Add Reg – Address(31:0)
st0_hdr(127:96) <= 00000000h - Reserved
If this mapping is not correct please write the correct one.
Thank you.
Serge