After watchdog for dual-config is enabled, the FPGA seems like not work properly every dozens of seconds. Why?

I programmed the same pof file into both image0 and iamge1.

Hi,

May I know how do you confirm if the correct image is loaded into the FPGA? Does both image will have the PHY communication work? Is there any different between the 2 image?

Ir shouldn't influnce the PHY comminication and I also wonder why. But PHY comminication works well when I disable the watchdog. While after I enable watchdog, the PHY communication works unnormally. Every dozens of seconds the communication will be missing for around 2 seconds. It seems like the PHY is reset. But I don't know why?

And is what I modified in the code for reseting watchdog right? Thanks!

@JohnT_Intel​

Hi,

May I know what do you mean PHY communication is not working? The dual configuration and watchdog timer shouldn't impact your PHY communication. Could you check if your design is working correctly?

@JohnT_Intel​

I modified my code like below. Is this OK? But PHY communication still not work normally. Once I disable the " watchdog enable checkbox" it's OK while after enable it, it will not be OK. I reset watchdog only once at the initial state highlighted with bold character.

DualConfig0 : process( plClk )

begin

if rising_edge( plClk ) then

slavmm_rcv_read <= '0';

sl3avmm_rcv_address <= B"000";

slavmm_rcv_write <= '0';

sl32avmm_rcv_writedata <= X"00000000";

case stDualConfigState is

when ST_DUALCONFIG_IDLE =>

if slGoReboot = '1' then

if slToBeErase = '0' then

stDualConfigState <= ST_DUALCONFIG_WRWAIT;

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"001";

sl32avmm_rcv_writedata <= X"00000001"; -- application image(image0)

end if;

if slFaultRetrigger = '1' then

stDualConfigState <= ST_DUALCONFIG_WRWAIT;

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"001";

sl32avmm_rcv_writedata <= X"00000003"; -- factory image(image1)

end if;

end if;

if slWatchdogResetFlg = '0' then

slWatchdogResetFlg <= '1';

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"000";

sl32avmm_rcv_writedata <= X"00000002";

end if;

when ST_DUALCONFIG_WRWAIT =>

stDualConfigState <= ST_DUALCONFIG_READ;

when ST_DUALCONFIG_READ =>

stDualConfigState <= ST_DUALCONFIG_RDWAIT;

slavmm_rcv_read <= '1';

sl3avmm_rcv_address <= B"011";

when ST_DUALCONFIG_RDWAIT =>

stDualConfigState <= ST_DUALCONFIG_TRIGGER;

slavmm_rcv_read <= '1';

sl3avmm_rcv_address <= B"011";

when ST_DUALCONFIG_TRIGGER =>

slavmm_rcv_read <= '1';

sl3avmm_rcv_address <= B"011";

if sl32avmm_rcv_readdata(0) = '0' then

stDualConfigState <= ST_DUALCONFIG_TRIGGER_DONE;

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"000";

sl32avmm_rcv_writedata <= X"00000001";

end if;

when ST_DUALCONFIG_TRIGGER_DONE =>

null;

when others =>

null;

end case;

end if;

end process;

Hi,

It looks good but there is still some problem where the state machine will be reset whenever you trigger the reconfiguration. So I do not think that it will go to ST_DUALCONFIG_TRIGGER_DONE state. You will need to modify your code so that when the Application image is loaded then you will performed watchdog timer reset.

Will the code below OK? But after write sl32avmm_rcv_writedata <= X"00000001"; then FPGA will be reconfiged, I guess FPGA will not receive reset cmd sl32avmm_rcv_writedata <= X"00000002"; How should I set reconfig and watchdog reset in my code? Thanks!@JohnT_Intel​

(50Mhz clock)

when ST_DUALCONFIG_TRIGGER =>

slavmm_rcv_read <= '1';

sl3avmm_rcv_address <= B"011";

if sl32avmm_rcv_readdata(0) = '0' then

stDualConfigState <= ST_DUALCONFIG_TRIGGER_DONE;

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"000";

sl32avmm_rcv_writedata <= X"00000001";

end if;

when ST_DUALCONFIG_TRIGGER_DONE =>

slavmm_rcv_write <= '1';

sl3avmm_rcv_address <= B"000";

sl32avmm_rcv_writedata <= X"00000002";

when others =>

null;

end case;

Hi,

You just need to performed once after you reconfigure the Max 10 device.

Will i need to ​ reset watchdog timer frequently, or just at the time when I need reconfiguration?@JohnT_Intel​