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KWang97's avatar
KWang97
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

After watchdog for dual-config is enabled, the FPGA seems like not work properly every dozens of seconds. Why?

FPGA communicates with another FPGA with PHY chip. Normally(watchdog enable checkbox not checked), the PHY link led is always off when communication is good. While after I enble watchdog for dual-config(watchdog enable checkbox checked) and set watchdog value to any value, the link led will be on for about 2 seconds and return to be off. This will also be repeated after dozens of seconds. Why? How will I use the watchdog for dual-config? I didn't run remote update after power-up and the FPGA just run application firmware(just ethernet communication with another FPGA using PHY chip).

Attached file is my fpga code for the dual-config.

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  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    May I know what do you mean PHY communication is not working? The dual configuration and watchdog timer shouldn't impact your PHY communication. Could you check if your design is working correctly?

  • KWang97's avatar
    KWang97
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Ir shouldn't influnce the PHY comminication and I also wonder why. But PHY comminication works well when I disable the watchdog. While after I enable watchdog, the PHY communication works unnormally. Every dozens of seconds the communication will be missing for around 2 seconds. It seems like the PHY is reset. But I don't know why?

    And is what I modified in the code for reseting watchdog right? Thanks!

    @JohnT_Intel​

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    May I know how do you confirm if the correct image is loaded into the FPGA? Does both image will have the PHY communication work? Is there any different between the 2 image?

  • KWang97's avatar
    KWang97
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    I programmed the same pof file into both image0 and iamge1.

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    May I know if you observed PHY communication down, do you observed the image reconfigure? Are you able to check if you assert the reset the watchdog timer correctly?

  • KWang97's avatar
    KWang97
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    Yes, I see PHY communication down with Link LED on while it should be always off in normal situation.

    The image didn't reconfigure because I didn't trigger it at all. And other parts of my code runs normally.

    As to the Are you able to check if you assert the reset the watchdog timer correctly, that's what I am discussing with you and I also upload the code above 30minutes ago. So please help me see if it's OK?

    @JohnT_Intel​

  • JohnT_Altera's avatar
    JohnT_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi,

    The code looks goods. I just ask to double confirm in hardware but since you mention that reconfiguration is not happening is not happening then it should be fine. You will need to further debug what is actually happening that cause teh PHY communication to be down.

  • KWang97's avatar
    KWang97
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    It happens once I enable the watchdog , even I didn't use dual-config IP(write any code to dual-config IP). so I wonder why this can influnce PHY communication.@JohnT_Intel​

  • KWang97's avatar
    KWang97
    Icon for Occasional Contributor rankOccasional Contributor
    6 years ago

    I wonder why is 0x1FFF? The value should be 12 bits while 0x1FFF has 13 ones.