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Altera_Forum's avatar
Altera_Forum
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10 years ago

Active serial interface for Arria V

I am designing a board with Arria V FPGA with active serial interface. Device : 5AGXMB1G4F35C5N.

I am using EPCQ256SI16N as a serial flash memory. I would be initially downloading the code using JTAG cable to serial device through FPGA.

I have attached a snapshot of the schematic.

It would be of great help if anyone could review the schematic and confirm its correctness.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    MSEL strapping look correct. You need power to pin 4 of your programming header - assuming it's intended for use with a USB-Blaster or similar. Check what voltage in the Arria V configuration section of the handbook (2.5V, I think).

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thanks a_x_h_75 and vinheal.

    I would be programming initially the serial memory through JTAG interface.

    I would need remote flash upgrade feature at later stage for downloading a new configuration through a custom developed protocol.

    Would this H/W setup allow me for such feature?

    I came across a document which says that I cannot have remote flash upgrade feature in JTAG mode. I have attached the snapshot of the table.

    Can anyone please clarify me on this?

    Document link: https://www.altera.com/en_us/pdfs/literature/hb/agx/agx_51003.pdf

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    The "JTAG" row in that table isn't relevant to your setup. Your chosen configuration scheme is "AS". JTAG will be available to you in that mode - as it is for all modes.

    Some device families allow you to strap MSEL such that only JTAG configuration is available. The row of the table you refer to covers that configuration option even though the Arria V docs suggest JTAG only configuration isn't supported.

    Cheers,

    Alex