Altera_Forum
Honored Contributor
Honored ContributorAccessing HPS Pins
Hello, I know I can route HPS pins to the FPGA side but is it possible to do the opposite, route FPGA side logic to HPS part pins? Thank you
Forum Discussion
Altera_ForumHonored Contributor
Honored ContributorMore than that but it depends on what is hooked up to it on the board, the board design, constraints, on-chip timing needs, etc.. (the same sort of stuff you worry about with the FPGA I/O).
The biggest limiting factor will be the lack of delay chains and registers in the HPS I/O so any interface tuning will be limited to the fitter moving registers around in the FPGA to adjust the clock and data relationships. What I've been telling people is that unless you use them like PIOs then you better know how to write .sdc constraints :)
