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Altera_Forum's avatar
Altera_Forum
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15 years ago

Accessing DDR2 SDRAM without using Nios processor.

Hi all.

I am making a video elaboration system, and i would like to perform a real time elaboration.

I need to perform many video elaborations on many entire video frames, so i need to be able to save them and to read them.

I was thinking to use a DDR2 SDRAM in order to obtain enough bandwidth and enough space to store data.

I've seen that Altera provides a DDR2 controller, but i would like to know how I could interface a custom block with that.

I mean, how could i write 4 sequential video frames on the SDRAM an then read them in hardware (for exaple, to implement a 2D FIR that works on the previous pixel values and neighbour pixel...)?

any hint would be precious.

Thanks for any help

Best regards

Phate.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Why not use a free Nios/e processor to control the DMA transfers to and from memory and to allow changing some parameters (like i.e. FIR coefs) ?

    The real image processing pipeline would be done with "Avalon ST" components (fast and simple blocks).
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    thaks for your reply.

    Well, I don't want to parametrize VIP blocks through NiosII.

    I have to write a custom block that interfaces with avalon ST-video protocol and performs video elaborations accessing multiple frames saved into the sdram.

    so, i was thinking if there are any IPs that could help me to do something like that, or how should behave my own code to perform hardware access to the SDRAM.

    any example would be precious!

    best regards

    Phate.
  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Thanks for your reply.

    Well, I tink i've already seen it, and i am still trying to work out with the frame reader. I'll take another

    but i need to take the video pakets over the avalon-st interface and save them for an entire field as image into the SDRAM. then, read that image with a custom block, not with the frame reader, then save the processed image into a new memory (maybe SSRAM this time) and then read the processed image with the frame reader.

    My problem is how can i access the SDRAM to write and then how can i read from that writing a custom block? wich are the signals I need to interface with the SDRAM DDR2 hp controller provided by Altera?

    Anyway, if there are more simple way to make something like that, i would choose the simple way!

    Thanks a lot for the reply

    best regards

    Phate.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Hi,Phate,

    I am doing the similar thing with you. Since the DDR2 controller has only a write fifo, my suggestion is that you could add extra write fifo and read fifo to save temporary data, and a arbitrator for read/write. But there are still some issues in my design, so i do not know whether it really makes sense. Do you have any progress?

    Sue
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Hi,

    Actually, I'm trying to use the DDR SDRAM also (Stratix II development board) with my own controller.

    Right now, it's quite tough to get the min operating frequency (75 MHz), due to the critical path. I'm not sure but I heard about using a DDR SDRAM with a slower clock than the one specified in the datasheet. Does sb know if it works ?

    Julien.