Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi,Phate,
I am doing the similar thing with you. Since the DDR2 controller has only a write fifo, my suggestion is that you could add extra write fifo and read fifo to save temporary data, and a arbitrator for read/write. But there are still some issues in my design, so i do not know whether it really makes sense. Do you have any progress? Sue