Forum Discussion
Stratix IV 530 Dev. PCB factory_recovery mismatch
I inherited this Stratix IV 530 Dev. board which I can not program the CFI FLASH. I am following the guide but there is a mismatch somewhere. When I try to restore the factory recovery setting of the CPLD and CFI the JTAG codes do not agree with the board components. The board is from 2009. Where do get the .sof, .pof for my board? I downloaded the installation kits for the 530 version 10.1 and 11.1 but they don't work.:(
Thanks, S.22 Replies
- Altera_Forum
Honored Contributor
Which Stratix IV GX 530K board? Post a link. It'll help people figure out if they have the same board as you.
Cheers, Dave - Altera_Forum
Honored Contributor
As far as I can tell there is only one (DK-DEV-4SGX530N) : http://www.altera.com/products/devkits/altera/kit-siv-gx.html#contents
I downloaded the kit installation for this board with the factory recovery files and instructions, etc. I tried using the "restore.sh" and also using NIOS II FLASH programmer. The programmer gave me an error saying that the JTAG IDs of the CPLD and CFI mismatch. I compared the CFI memory map with the 230 version of the board at it is different. The user HW space for the 530 starts at 0x2000000 while the 230 starts at 0xC200000. I wonder if Altera has an archive of configuration files for older boards? although they are still selling them for $5995... Thanks Dave, S. - Altera_Forum
Honored Contributor
--- Quote Start --- As far as I can tell there is only one (DK-DEV-4SGX530N) --- Quote End --- There are other boards from other manufacturers, eg., the Terasic DE4. I have this board, but in the 230K version. I've never bothered to use the factory files. What is it you want to get from the factory files? For example, if you want to know that you have a sane setup, I could send you a basic blinky LEDs file. It would be for the 230K design. But if you look at the pin assignments file I send you, you can check whether the assignments are the same on the 530K, or if you are worried about damaging the board, I can take a look tomorrow. If you really want to get the factory recovery files to work, I can try the 230K versions. Cheers, Dave - Altera_Forum
Honored Contributor
You are very kind, thanks. I do have a NIOS II design with PCIe core that works fine on the 530 board. Now I want to program the CFI so that it can boot and run on powerup.
This is the first time that I am trying to program the CFI of this board and I can't do it. I am following the user guide carefully. I don't quite understand why when I make the .flash I have to have the --offset=0x02000000 and when programming the CFI there I have to use a --base=0x08000000. These numbers don't agree with the memory map table provided above. There is a rotary switch which needs to be turned after programming. I don't care about the factory file, it's just that I can't program my design so I figured I would try the factory recovery files but they don't program either. What CFI address does the FPGA start configuring from? 0x00000000 ? or is it offset by the CPLD and the rotary switch? Can you see if it makes sense to you: sof2flash --input= <yourfile>_hw.sof --output=<yourfile>_hw.flash --offset=0x2000000 --pfl --optionbit=0x00018000 --programmingmode=PS Then, nios2-flash-programmer --base=0x08000000 <yourfile>_hw.flash http://www.altera.com/literature/ug/ug_sivgx_fpga530_dev_kit.pdf Cheers, S. - Altera_Forum
Honored Contributor
I'll look at the 230K tomorrow and try reprogramming the flash on that. The procedure should be identical. If the instructions are somehow incorrect, I'll figure out the correct procedure for you and post it here.
Cheers, Dave - Altera_Forum
Honored Contributor
I've installed the v11.1 files for the 230K and 530K design. The earlier version of the 230K design uses SOPC builder to define the board-update-portal design. If you open the SOPC system, the ext_flash is mapped to 0x0800_0000. That is why the nios2-flash-programmer commands used to communicate with that design use 0x0800_0000 for the flash address.
The v11.1 designs use Qsys. If I open the Qsys system for the v11.1 230K or 530K design, the flash (ext_flash) is mapped to address 0 of a pipeline bridge, which is mapped to address 0x0800_0000 in the CPU address map. So, both the old and new design should work with the commands you quoted above from the user guide. I'll update my board and post the results. Cheers, Dave - Altera_Forum
Honored Contributor
Thanks Dave. I also found the proper installation for my dev. board by going to all the way back to:
ftp://ftp.altera.com/outgoing/devkit/91/stratixive_4se530es_fpga_v9.1.0.exe and downloading the factory recovery files which I installed with ./restore.sh Once that was done I was able to install the userfile_hw.flash according to the user guide. Interestingly, in this version of the instructions, the --offset=0x0 but when programming (as you explained) the --base=0x0800_0000. Cheers, S. - Altera_Forum
Honored Contributor
--- Quote Start --- Thanks Dave. I also found the proper installation for my dev. board by going to all the way back to: ftp://ftp.altera.com/outgoing/devkit/91/stratixive_4se530es_fpga_v9.1.0.exe --- Quote End --- You have a kit with an E-series device? So you don't have a GX kit then (which has transceivers)? --- Quote Start --- and downloading the factory recovery files which I installed with ./restore.sh Once that was done I was able to install the userfile_hw.flash according to the user guide. --- Quote End --- Excellent! --- Quote Start --- Interestingly, in this version of the instructions, the --offset=0x0 but when programming (as you explained) the --base=0x0800_0000. --- Quote End --- The readme.txt file in the couple of kits I looked at indicated that the User Manual instructions had some errata. Check the readme.txt in your install area, perhaps it has a similar comment. Cheers, Dave - Altera_Forum
Honored Contributor
I'm not out of the woods yet...Yes, I was able to restore the factory backup files using the ./restore.sh and it boots up and runs. However, even though I was able to program the CFI with the user_hw.flash it does not bootup (configure the FPGA), i.e. I don't get the green LED to light up. I tried the following:
1)offset 0x0, program at base address 0x0800_0000 fails to boot (according to guide) 2)offset 0x200_0000 (the user HW start from memory map table), base address 0x0800_0000 =>fails to start programming 3)offset 0x002_0000 (factory HW start), program at base address 0x0800_0000, fails to boot 4)tried a simple flashing LED design, the same results, fails to boot P.S. I am using the NIOS II EDS method not the Board Update Portal. Has anyone programmed a Stratix IV 530ES CFI and have it bootup? I am looking for any small design that can be programmed into the 530ES user HW space with the instructions to do it, that work. Preferably a design with a NIOS II and some SW. I have not confidence in the user guide instructions anymore. Thanks, S. - Altera_Forum
Honored Contributor
--- Quote Start --- Yes, I was able to restore the factory backup files using the ./restore.sh and it boots up and runs. --- Quote End --- Ok, that is a good start. --- Quote Start --- However, even though I was able to program the CFI with the user_hw.flash it does not bootup (configure the FPGA), i.e. I don't get the green LED to light up. --- Quote End --- To isolate whether its your programming image do the following; 1) Confirm you can program your custom hardware design using JTAG. 2) Confirm that the user area works by programming it with the flash image that restore.sh uses, i.e., program that same image to both the factory area and the user area. Then use the selector dial to select factory or user and confirm that both boot up ok. That'll confirm the MAX II passive serial programmer is working correctly. 3) Rebuild the factory image and flash it to the user area. At that point you will either have confirmed that flash programming works, and perhaps you'll figure out what is wrong with your hardware image. Cheers, Dave