Forum Discussion
hsyn
New Contributor
6 years agoSPI TIMING CONSTRAINTS
Hello,
How can I constraint spi signals shows on below?
I didn't understand how I can write a sdc file for this scenario.
3 Replies
- hsyn
New Contributor
- KennyT_altera
Super Contributor
Hi, you may refer to https://community.intel.com/t5/FPGA-Wiki/Constrain-SPI-Core/ta-p/735358
It had example datasheet over there. You can take a look and follow.
- KennyT_altera
Super Contributor
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