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Altera_Forum's avatar
Altera_Forum
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17 years ago

New to Altera. Error on Downloading bitstream

Hi All,

I'm a new to Altera and I have a Cyclone II EP2C35 devkit. I wrote a small VHDL file which waits for one of the SW buttons and toggle a led. I made the pin assignements, synthesis, ....

When I try to download the bitstream into the FPGA, the Error led lights up and the board falls back to the default factory config. However, the messages pane says it has successfully downloaded the bitstream. I do not use SOPC builder. I just want to download my simple circuit into the FPGA.

Do you have any ideas. The starter kit manual did not help as it uses SOPC builder.

Another question : when I download the bitstream, the FPGA is immediately reconfigured right ? I mean, the binary is not put somewhere, and I have to do some operation to get it into the FPGA ?

Thanks

9 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    first of all which interface you use for programming and so check your pin assignments for the fpga because there are some pins you cannot assign as i/o and there are dedicated clocks so you must be aware of pin assignments at first iteration

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    you can see all pins' usage and extra functionality in pin planner tool

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    I assigned two pins : the Y11 for input as in bit, and W11 for output as out bit.

    my interface is :

    entity e is port (toggle : in bit; led : out bit) end;

    it uses no clock.

    I use the USB interface to program the FPGA.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    You should check, if unused pins are configured as inputs with weak-pullup. If they are configured as outputs, they may be conflicting with existing connections at the DevKit.

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    Would you please tell me how to do that ?

    --- Quote End ---

    Go to 'Assignments', 'Device' and click the bar 'Device and pin options'.

    Go to 'Unused Pins' and under 'Reserve all unused pins' select 'As input tri-stated' or 'as input with weak pull-up'.

    Then press 'OK' and 'OK' again and recompile. I use this board and that resetting problem is nearly always caused by this issue.
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    --- Quote Start ---

    Could you explain this setting ?

    --- Quote End ---

    By default any pins you do not assign are set to outputs. One of those unassigned pins triggers the power up configuration of the FPGA from the FLASH memory - the power up condition. Setting all unused pins to inputs prevents this.