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Altera_Forum
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17 years ago

New to Altera. Error on Downloading bitstream

Hi All, I'm a new to Altera and I have a Cyclone II EP2C35 devkit. I wrote a small VHDL file which waits for one of the SW buttons and toggle a led. I made the pin assignements, synthesis, .......
Altera_Forum's avatar
Altera_Forum
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17 years ago

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Could you explain this setting ?

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By default any pins you do not assign are set to outputs. One of those unassigned pins triggers the power up configuration of the FPGA from the FLASH memory - the power up condition. Setting all unused pins to inputs prevents this.