New edition CVGT Board just arrived from Terasic. My already working programming script fails

(Novice? - LOL, been using programmable logic since the MMI PLD days)..

Note: I did try to slow the JTAG down from the default of 24M to 6M but it still failed.

Digging in further, it seems there is a new Micron NOR Flash in place of the previous Flash part.

New part:

Parallel NOR Flash Memory PART
MT28EW01GABA1HPC-0SIT

64M by 16.

Old Part:

Numonyx PC28F00AP30BF, a 64M by 16 Nor Flash

Hello,

Thanks for using Intel FPGA forum.

To make sure we talking about the same board, is this the board you are using now?

link : https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=843

please confirm.

regards,

Farabi

Yes, that is correct.

I have debugged this in more detail.

TLDR: The new edition has both a new flash and a new binary for the on board MAX V device, which is configured as the Flash controller.

Intel need to:

1. Publish the new MAX V binary and source code

2. Publish the new schematics

Then I can update our company design files and get this board running in our system.

This new MAX V binary is different from the old design, but the Dev kit instructions still offer up the old design files.

If you install the older MAX V binary this new board can no longer talk to the flash part at all.

Do not do the "restore factory" process from the existing (old) Dev kit, it will brick the board.

We have a custom version of the MAX V design that we will have to update to the new board design as soon as we can get the source code for the new Factory MAX V design.

Hopefully the people who worked on this board are still with the "new Altera"..

I thought so originally, but Terasic informed me this is an Intel/Altera designed board, and Terasic "are just the distributor" for these. I had incorrectly assumed they were designed and built by Terasic.

Hi,

Can you please share the error message?

Did you try using the files available on Cyclone® V GT FPGA Development Kit (intel.com) along with correct DIP switch settings on the board as per the user guide?

Regards

Yes, the error message is in my initial post, but I'll repeat it below.

The files from Intel only work with the old design, as it has a different flash device and as it turns out, different firmware for the Max V CPLD used as the flash controller. If I try to use those old files, it stops the on board flash completely and almost bricks the board.

I was able to read out the new Max V binary from a different new board and use that to restore the Max V on the board I'm testing.

Quartus programmer reports this error:

Error (18591): Can't recognize the Flash device that attached to device 2. The Flash device is not supported by Quartus Prime software.

I also get the same error from our programming script that has been working for a few years.

I have tried my older installed Quartus, and today just installed the latest 23.1 std edition. All report the same error.

Irrelevant and not helpful.

The hardware has changed from the old edition to this new edition but Intel have not published the new changes, thus the dev kit doesn't work with it.