LLM Implementation on Agilex 5 E-Series 065B Modular Dev Kit

I am currently working on deploying Large Language Model (LLM) inference using FPGA AI Suite on the Agilex 5 E-Series 065B Modular Development Kit.

I have two clear and specific questions:

1. Is the Agilex 5 E-Series 065B officially supported for LLM / Transformer inference with FPGA AI Suite?
2. Is the following workflow officially supported for LLM inference on this board?

• Step 1: Export a pre-trained LLM from Hugging Face to OpenVINO IR format using optimum-intel 
• Step 2: Generate the target FPGA architecture file using architecture_optimizer for Agilex 5.
• Step 3: Compile the OpenVINO IR model for the FPGA using:
  • dla_compiler → for Sequential flow, or
  • Spatial Compiler → for Spatial flow.
• Step 4: Integrate the generated FPGA AI Suite IP into a Quartus Prime project, generate the bitstream, and program it onto the Agilex 5 E-Series 065B board.
• Step 5: Run inference using the FPGA AI Suite runtime (host application).

I understand this may not be a push-button process and could require significant modifications to the generated RTL — but is this workflow still considered a viable starting point for implementing LLM / Transformer inference on the Agilex 5 E-Series 065B?

Thank you.