New ContributorHow to Configure Nios II (PFGA Side) to Execute Code from SDRAM (HPS Side) on DE10-Nano
Hello everyone,
I’ve been working with the DE10-Nano board, following the guide provided in this link: SocBootFromFPGA (https://community.intel.com/t5/FPGA-Wiki/SocBootFromFPGA/ta-p/735773).
I successfully booted the HPS from the FPGA and ran the ARM Hello World program. Now, I’d like to make some modifications:
- Replace the ARM Hello World binary with a Nios II binary (nios_app.bin).
- Store the Nios II application binary on the SD card.
- Upon power-up, the HPS should load the Nios II application binary into SDRAM and signal that the code has been successfully loaded into SDRAM. Once the signal is received, the Nios II core in the FPGA should execute the code stored in SDRAM.
Steps I’ve Taken:
Booting HPS from FPGA: I followed the steps in the above guide to boot the HPS from FPGA successfully. The ARM Hello World program (hello-mkimage.bin) ran correctly.
Questions:
- What is the correct process for creating a Nios II application binary (.bin) that can be stored on the SD card and executed from SDRAM?
- Do I need to modify the preloader from the tutorial to load the Nios II binary into SDRAM automatically? If yes, what changes are required?
- How can I configure the Nios II processor to execute code directly from SDRAM using the HPS-to-FPGA SDRAM Bridge? (I refer Nios II Access HPS SDRAM example from the DE10-Nano System CDROM. I attempted to read data using ADDRESS_SPAN_EXTENDER_0_WINDOWED_SLAVE_BASE. However, doing this causes: My Nios II program to become stuck. The ARM Hello World program to stop running as well).
- How should I synchronize between the HPS and the Nios II core to ensure the code is loaded into SDRAM before execution starts?
My Setup:
- Board: DE10-Nano
- FPGA Tool: Quartus Prime 18.1
- EDS SoC: 18.1
- HPS Preloader: Configured based on the SocBootFromFPGA guide.
I’m still new to working with Nios II and the SoC FPGA, so I’d appreciate any guidance, examples, or configurations that can help me get this working.
Hi
In your use case, the HPS is using the DDR, the Nios could not run from the DDR.
The Nios would need a dedicated DDR to run on.
Regards
Jingyang, Teh
