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ChiNguyen18
New Contributor
New ContributorHow to Configure Nios II (PFGA Side) to Execute Code from SDRAM (HPS Side) on DE10-Nano
Hello everyone, I’ve been working with the DE10-Nano board, following the guide provided in this link: SocBootFromFPGA (https://community.intel.com/t5/FPGA-Wiki/SocBootFromFPGA/ta-p/735773). I succ...
Hi
In your use case, the HPS is using the DDR, the Nios could not run from the DDR.
The Nios would need a dedicated DDR to run on.
Regards
Jingyang, Teh
tehjingy_Altera
Regular Contributor
Regular ContributorHi
Happy New Year!
This is interesting, Have not tried this before.
However I think it is possible.
You would need to set the Nios to boot from the EMIF controller.
Then the HPS could writ the elf file into the DDR and reset the Nios.
You will need to set the Nios to boot on DDR. (set the reset and exception vector to DDR , Same as the flow in on chip memory)
Regards
Jingyang, Teh
