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ChiNguyen18's avatar
ChiNguyen18
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1 year ago
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How to Configure Nios II (PFGA Side) to Execute Code from SDRAM (HPS Side) on DE10-Nano

Hello everyone, I’ve been working with the DE10-Nano board, following the guide provided in this link: SocBootFromFPGA (https://community.intel.com/t5/FPGA-Wiki/SocBootFromFPGA/ta-p/735773). I succ...
Fpga Devkit
  • tehjingy_Altera's avatar
    tehjingy_Altera
    1 year ago

    Hi


    In your use case, the HPS is using the DDR, the Nios could not run from the DDR.

    The Nios would need a dedicated DDR to run on.



    Regards

    Jingyang, Teh


ChiNguyen18's avatar
ChiNguyen18
Icon for New Contributor rankNew Contributor
1 year ago

Hi,

Thanks for your response! To clarify, I don't need my Nios II program to run on the HPS. Instead, the HPS only acts as a loader — it stores the Nios II program on an SD card and loads it into the SDRAM. The SDRAM is on the HPS side, and my goal is for the Nios II processor on the FPGA side to fetch instructions directly from this SDRAM.

Is it possible to configure the system in this way?

Thank you!