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ChiNguyen18's avatar
ChiNguyen18
Icon for New Contributor rankNew Contributor
1 year ago
Solved

How to Configure Nios II (PFGA Side) to Execute Code from SDRAM (HPS Side) on DE10-Nano

Hello everyone, I’ve been working with the DE10-Nano board, following the guide provided in this link: SocBootFromFPGA (https://community.intel.com/t5/FPGA-Wiki/SocBootFromFPGA/ta-p/735773). I succ...
Fpga Devkit
  • tehjingy_Altera's avatar
    tehjingy_Altera
    1 year ago

    Hi


    In your use case, the HPS is using the DDR, the Nios could not run from the DDR.

    The Nios would need a dedicated DDR to run on.



    Regards

    Jingyang, Teh


tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi


As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.



Regards

Jingyang, Teh