Expected "channels" specification in the BSP's board_spec.xml but see nothing.
I'm learning about Intel's "channels" OpenCL extension for host-to-kernel and io-to-kernel communication. The training video says the specification of the board's available channels are in board_spec.xml. I looked in
intelFPGA_pro/19.3/hld/board/a10_ref/hardware/a10gx/board_spec.xml
intelFPGA_pro/19.3/hld/board/a10_ref/hardware/a10gx_hostpipe/board_spec.xml(I have an A10GX dev kit). The first board_spec.xml has no channels, while the second one has:
<channels><interface name="board" port="host_to_dev" type="streamsource" width="256" chan_id="host_to_dev"/><interface name="board" port="dev_to_host" type="streamsink" width="256" chan_id="dev_to_host"/></channels>Is this for PCIe? What about ethernet IO? How do I use channels with this board
Hi,
Yes host-to-dev channel and dev-to-host are supported only by "a10gx_hostpipe"BSP.
For question "Does Intel perhaps provide a BSP with ethernet available, since the dev kit comes with ethernet?", i would need some time to check it internally.
The BSP support host-dec streaming via pipe. The channel is provided for pipe to work. There is no difference between pipe and channel, it only the name difference here.
Thanks