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Altera_Forum
Honored Contributor
Honored ContributorEthernet with DSP Dev. Kit Cyclone III (no NIOS)
Hi,
I have the dsp development kit, cyclone iii edition (http://www.altera.com/products/devkits/altera/kit-cyc3-dsp.html). How can I use the Ethernet? In my altera > 80 > ip Directory I have triple_speed_ethernet. Will that work with this board? Or will I need additional IP-Cores? Will they also be shipped with my dev. kit? And are there IP-Cores for USB-Communication? Kind regards, Stefan__66 Replies
Altera_Forum--- Quote Start --- To send a packet, you need to use the Avalon stream sink ff_tx. You don't have any address there, just send your words one after the others and use the rdy/wren for flow control. --- Quote End --- Yes, but if I don't use the TSE core (because my Cyclone ii Board does not need it) then I must use the following pins: Address Enable, Synchronous Ready, VL Bus Access, Local Device, IO Char Ready, Address Strobe, Local Bus Clock, Ready/Return, Bus Cycle, Write/Read, Bus Chip Select, Interrupt, Byte Enable (0...4), Read, Write, Address Line (1...15) and Data Line (0...31). I have a manual about the mac/phy-chip (http://www.smsc.com/media/downloads_public/data_sheets/91c111.pdf) but I couldn't find the information I need. I tried to capture the packets with wireshark but I couldn't see them.- Altera_Forum
I don't know this chip, but it doesn't look very easy to use without a CPU. You will have to configure a few registers before being able to use them, and allocate a buffer in the chip's memory to put your packet to transmit. There is a list of actions to perform on pages 85-87 of the datasheet.
- Altera_Forum
OK. Now I am using the Cyclone III DSP Dev. Kit with TSE core. I can only create a time limited SOF file.
If I connect the Board to my PC via Ethernet cable, windows says that there is no network connection. Has that something to do with the time limited file or is something else wrong? With other boards windows showed at least that there is a connection... - Altera_Forum
No, you should have a connection. One of the LEDs (10 / 100 / 1000) should also be on. If its sot the case, check the signals to the PHY, especially reset_n. Maybe you are forcing the PHY in reset state...
- Altera_Forum--- Quote Start --- One of the LEDs (10 / 100 / 1000) should also be on. If its sot the case, check the signals to the PHY, especially reset_n. Maybe you are forcing the PHY in reset state... --- Quote End --- None of the LED is on. I checked the reset signal and thought I found the error: I connected port "reset" of TSE core to ENET_RESETn, so I added an inverter. But it didn't help. I can put the reset port to constant 1 or 0, it's no difference. I wonder where to connect management bus data , management bus data clock and 1000 mb link established on the TSE. When I program my time limited SOF file on the board, it says: remaining time: unlimited (which can not be because I do not have a license) I also did the timing constraints. To configure the registers (command_config) I sent the according signals to address and writedata and sent a positive edge to the write port of the TSE.
- Altera_Forum
On the Board (near the ethernet connector) there are two Pins and next to them is a label: ENET_HSDAC.
One pin is P, the other is N. I wonder whether it's something like a jumper that I have to set in order to use the Ethernet. But maybe P means plus and M means minus, then I have a short circuit. In the data sheet these pins are not mentioned. But the PHY Chip has normal temperature (~35°C), so it seems that the PHY is working. All the LED (10,100,1000,duplex,tx,rx) are off. Do you think that the board could be damaged or something? I am working since two days on it and I still don't even get a physical connection... - Altera_Forum
They are not connected on my board either.
Did you try the nios ii 3c120 design example (http://www.nioswiki.com/exampledesigns/niosii3c120designexample) from Nios Wiki? That way you would know if there is a problem with the board. - Altera_Forum
I started compiling it (./create-NO_MMU_DEV) and it took ~40 minutes. Does this occur at your PC too?
I programmed the (time limited) SOF File to the Board. That works, on the two Displays I can read "Wind River Linux for NIOS II" and "ID: 0x2EA82CDC ...". To check the Ethernet, I used simple socket server plus (http://www.nioswiki.com/exampledesigns/simplesocketserverplus), which is also working now. My question for you is: In one of your previous posts you said that it is possible to use the NIOS as an Ethernet driver. Does that mean that I can use this Simple Socket Server Plus for NIOS in my FPGA-Design? The FPGA itself should also do some other work like reading from the ADC and writing and reading from/to the DDR2-SDRAM. - Altera_Forum
Yes you can open the created project in Quartus and modify it to suit your needs. You can add/remove peripherals in SOPC builder and recompile it. (don't forget to edit the top level file too, of course)
And yes, the compiling took a long time on my PC too. The system is quite complex, with a lot of peripherals. - Altera_Forum--- Quote Start --- And yes, the compiling took a long time on my PC too. The system is quite complex, with a lot of peripherals. --- Quote End --- At the NiosII3C120DesignExample project, I tried to remove some options at the menu Assignments > Settings and remove some components in the SOPC Builder but it did not help. What did you do to get it faster?
