DK-DEV-AGI027-RA: JTAG chain broken after Nios V Hello, FPGA recovery fails

Hello,

I am using the following board and host environment:

• Board: Agilex 7 FPGA I-Series Development Kit, DK-DEV-AGI027-RA
• Serial number: 8100604
• Quartus Prime Pro: 25.3.1
• Host OS: Windows 11 Pro

Before this issue, the board was working normally with CXL ED and PCIe designs.

Issue summary

After successfully running a modified version of the "Nios V Hello" tutorial design (SOF + ELF) on this kit, Quartus Programmer can no longer detect the JTAG chain reliably. "Auto Detect" fails, and the JTAG Chain Debugger reports unknown devices and possible JTAG signal issues.

Steps and observations

1. I modified the Nios V Hello tutorial design (SOF + ELF), including pin assignments and power management & SmartVID assignments, to match DK-DEV-AGI027-RA. Programming completed successfully, and I confirmed the expected "Hello" output.

After that first run, I attempted to download an updated SOF, but Quartus Programmer "Auto Detect" failed.

JTAG Chain Debugger screenshot:

Programmer/Debugger log:

!Error: JTAG chain problem detected

!Error: TDI connection to the first detected device UNKNOWN_00000001 might be shorted to GND

!Error: The TCK and TMS connections to the device before the first detected device UNKNOWN_00000001 might have a problem

!Info: Detected 2 device(s)

!Info: Device 1: UNKNOWN_00000001

!Info: Device 2: UNKNOWN_020D10DD

Recovery attempts and results

2. Connected an external USB-Blaster II to J10, set SW8.3 = ON, and completed MAX10 recovery successfully.

3. Set SW8.3 = OFF to attempt FPGA recovery. Quartus Programmer Auto Detect still failed.

4. Loaded the predefined fpga_recovery.cdf and attempted to program AVSTX8.pof, but it failed with:

Error(209062): Flash Loader IP not loaded on device 2

Error(209012): Operation failed

5. Set SW8.2 = ON to remove the FPGA from the JTAG chain, then successfully programmed AVSTX8.pof into QSPI.

6. Set SW8.2 = OFF again, but Auto Detect still failed.

7. Removed the external USB-Blaster II and tried the embedded JTAG interface. Auto Detect still failed.

Questions.

1. Are there additional recommended steps beyond MAX10 recovery and programming the recovery POF to QSPI (for example, specific switch combinations, a required full power-cycle sequence, or other board-level recovery steps)?
2. If MAX10 recovery completes but JTAG remains broken on both external and embedded JTAG, does this suggest a likely hardware issue (JTAG path, FPGA, or related circuitry) that requires RMA?
3. Is there anything in the Nios V Hello tutorial flow that could plausibly cause this condition (for example, power management settings, pin assignments, or JTAG-related settings)?

If needed, I can share additional logs, exact switch settings, and any other diagnostics you recommend.

Thanks.