IOzan
Occasional Contributor
1 year agoDE10-Nano burning via JTAG J8 external blaster and PCB Layout schematic
Hello,
I have been working with the DE10-nano card for a while. I have two questions that require your attention:
- I want to burn to the FPGA and EPCS64 (.sof and .jic files) via the J8 connector that I assembled (and an external USB Blaster). I prepared the .jic file according to the User manual (Chapter
and via the J13 connector I manage to burn it successfully (MSEL[4-0]=10010). Now I change J13 to J8 and then it fails to burn. What could be the problem? Is there any manual that explains how to burn the FPGA from an external Blaster via the J8 connector? - I want to try to debug the DDR3 so from the electrical diagram I cannot see all the test Points located next to it. Is it possible to get the PCB layout files for the card? (any viewer will do just fine).
Thanks a lot,
Idan,