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IOzan's avatar
IOzan
Icon for Occasional Contributor rankOccasional Contributor
1 year ago

DE10-Nano burning via JTAG J8 external blaster and PCB Layout schematic

Hello, I have been working with the DE10-nano card for a while. I have two questions that require your attention: I want to burn to the FPGA and EPCS64 (.sof and .jic files) via the J8 connector t...
Board Debug
FakhrulA_altera's avatar
FakhrulA_altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi,


To burn the FPGA and EPCS64 via the J8 connector, you should check the pin assignments, MSEL settings, power supply, grounding, and cable quality, as J8 may have different requirements than J13. Reviewing the DE10-Nano schematic and user manual can help identify the correct configurations, and you may find further assistance from Terasic forums or support. You can refer, DE10-Nano User Manual.

For debugging DDR3, you can trace signals using the schematic and tools like logic analyzers or oscilloscopes. PCB layout files are typically not available, but you can reach out to Terasic support to inquire about access to layout diagrams or a simplified viewer for debugging.


Hope this helps!


Regards,

Fakhrul