CYCLONE V FPGA POWER-UP SEQUENCE
Currently i am using the below cyclone V FPGA for my design,
Part: 5CGTFD7D5F27I7N
As per the CV-52001 (2023.10.18) -Volume 1: Device Interfaces and Integration
The recommended power-up sequence given as below,
Here Group -1 to be powered up first then followed Group 2
In group -2 is there any specific order to be followed?
1) Query: eg. VCCPGM should first then followed by VCCIO then VCCPD?
As per the table 10-1 , point 33 is not clear for me, can anyone help to provide more details.
In my case i am using VCCIO as 3.3V ,1.35V,2.5V and VCCPD as 3.3V,2.5V & VCCPGM as 3.3V,
2) Query: Bank 3B/4A and Bank 7A/8A uses VCCIO as 1.35V and VCCPD as +2.5V,
So can i enable the 3.3V first on group 2 and followed by 2.5V and 1.35V, Is this sequence is acceptable?
Regards,
Anbarasu S