CYCLONE 10 GX I/Os spec
Hi, I already use xilinx FPGA but it's my first time about INTEL FPGA and i need help.
I need to develop a camera with lvds I/Os @ 960MHz . I thinks that i will use Cyclone 10 Gx but i have somes problems with I/Os spec.
The lvds camera sensor spec are :
VDCM = 0.9v ; VOD between 0.1 and 0.2V.
I understand that i cannot use LVDS I/Os standard because in picture1 we can see that for Dmax>700mbps, VIMC(dc) need to be beetwen 1.0v et 1.85V. It's not the case (0.9v here).
So I suppose that i need to use RSDS (HIO) standard for this sensor.
When i check, spec of RSDS signal,we can read (picture 2) that RSDS output is max 360 Mbps but in table we can see max 1434 Mbps. I'm not understand.
In my case, i will not use RSDS output, only input with SERDES but i don't know if there somes limitations about this type of signal? the value of 360Mbps afraid me, i don't understand this value.
So my questions are :
-- If RSDS input can be use @ 960Mbps (SERDES factor J will be 10) ?
-- if SERDES will accept RSDS signal or only LVDS ?
-- Is it possible to use LVDS input with VCM = 0.9 and Dmax>700Mbps ?
Thanks