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Afari6's avatar
Afari6
Icon for New Contributor rankNew Contributor
7 years ago

CYCLONE 10 GX I/Os spec

Hi, I already use xilinx FPGA but it's my first time about INTEL FPGA and i need help. I need to develop a camera with lvds I/Os @ 960MHz . I thinks that i will use Cyclone 10 Gx but i have somes pr...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi AA farid,

Please find my response below:

-- If RSDS input can be use @ 960Mbps (SERDES factor J will be 10)?

Yes, it can be interfaced with LVDS input.

-- if SERDES will accept RSDS signal or only LVDS ?

LVDS IP is working fine with RSDS.

-- Is it possible to use LVDS input with VCM = 0.9 and Dmax>700Mbps ?

Is risk to use with LVDS input to achieve DMAX > 700Mbps if the VCM is not higher to 1V.

Thank You.

Regards,

Yuan Li