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Shirley's avatar
Shirley
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6 years ago

[ADC-SoC] Low sampling rate of ADC LTC2308 on the ADC-SoC board

I have a Cyclone V SoC high-speed ADC Development Kit (ADC-SoC) from Terasic Inc. It uses ADC LTC2308 from Linear Technology. Both the ADC-SoC manual and the datasheet of LTC2308 says it has a sampling rate of 500ksps. However, during my measurement of LTC2308 in the ADC-SoC board using the example "ADC_SOC_ADC" provided by Terasic, it only has a sampling rate of 100ksps. Is it a hardware or software problem? Is there any way to make it 500ksps?

3 Replies

  • JonWay_C_Intel's avatar
    JonWay_C_Intel
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    6 years ago

    Hi @Shirley

    Check how many channels are you measuring? The more the channels the lesser the sampling rate. Check using just 1 channel, disable the others.

    • Shirley's avatar
      Shirley
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      6 years ago

      Hi JonWay, many thanks for your reply. I forgot to mention that I had figured out how to set a higher sampling rate. Changing the tHCONVST parameter in adc_ltc2308.v to a smaller value will increase the sampling rate. It's associated with the operation of ltc2308. The default value of tHCONVST is to set a sampling rate of 100ksps.

      • JonWay_C_Intel's avatar
        JonWay_C_Intel
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        6 years ago

        Thank you very much for your sharing. I'm sure this will be helpful to others who faces the same issue. Meanwhile, I will set this thread to closed.