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Occasional ContributorReference/Example software (C/C++-codes) for NIOSII processor which is interfaced with intel MDIO IP
I am trying to configure an Ethernet PHY using MDIO .
The MDIO lines of the Ethernet PHY is be connected to the intel MDIO IP in FPGA similar to the connection available in cyclone V GT evaluation board.
in my design the intel MDIO IP is connected to a NIOSII soft processor and external PHY.
Is it possible to get some reference/Example software(C/C++-codes) available for the NIOSII soft processor to make it work in the above scenario ?
3 Replies
SengKok_L_IntelRegular Contributor
Hi,
Probably you can refer to the user guide below, table 50 for the register map of MDIO.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf
Besides, you can use the IORD or IOWR IO macro to configure those register. Please refer to the handbook below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2sw_nii5v2.pdf
Regards -SK
Matt1hello Lim,
Thanks for the support.
I am a bit confused with the registers address especially offset registers address;0x20 and 0x21.
should I need to use the offset Register address or the byte address?
- SengKok_L_Intel
If you use the IORD or IOWR macro, you can use the offset registers address.
Regards -SK
