Forum Discussion
Matt1
Occasional Contributor
Occasional ContributorReference/Example software (C/C++-codes) for NIOSII processor which is interfaced with intel MDIO IP
I am trying to configure an Ethernet PHY using MDIO . The MDIO lines of the Ethernet PHY is be connected to the intel MDIO IP in FPGA similar to the connection available in cyclone V GT evaluation b...
SengKok_L_Intel
Regular Contributor
Regular ContributorHi,
Probably you can refer to the user guide below, table 50 for the register map of MDIO.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf
Besides, you can use the IORD or IOWR IO macro to configure those register. Please refer to the handbook below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2sw_nii5v2.pdf
Regards -SK
