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Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Reference/Example software (C/C++-codes) for NIOSII processor which is interfaced with intel MDIO IP

I am trying to configure an Ethernet PHY using MDIO . The MDIO lines of the Ethernet PHY is be connected to the intel MDIO IP in FPGA similar to the connection available in cyclone V GT evaluation b...
Matt1's avatar
Matt1
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

hello Lim,

Thanks for the support.

I am a bit confused with the registers address especially offset registers address;0x20 and 0x21.

should I need to use the offset Register address or the byte address?

  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    Icon for Regular Contributor rankRegular Contributor
    7 years ago

    If​ you use the IORD or IOWR macro, you can use the offset registers address.

    Regards -SK