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Jia3Xu's avatar
Jia3Xu
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3 years ago

HLS generate testbench failed.

I wrote a kernel defines like this: void simulateDDR_512(mm_8bit_t& storage, ihc::stream_in<mmCmd>& txWriteCmdFifo, ihc::stream_out<mmStatus>& txWriteStatusFifo, ihc::stream_in<mmCmd>& txReadCmdFi...
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BoonBengT_Altera's avatar
BoonBengT_Altera
Icon for Moderator rankModerator
2 years ago

Hi @Jia3Xu,


Noted on the emulation and apologies on the delayed in response, suspecting that the streaming interface declaration are having some problem. Did you managed to debug the code my removing some of the arguments in the method simulateDDR_512?


As for the streaming interface would suggest to refer to the para for the object on the stream_in in the example below:

- https://www.intel.com/content/www/us/en/docs/programmable/683349/23-3/pro-edition-streaming-input-interfaces.html


Best Wishes

BB