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New ContributorError (19877): Partial reconfiguration no longer supports synthesis revisions when trying to synthesize example design
Hi,
On my Intel DevCloud FPGA server, I trying to synthesize the following example:
/opt/a10/intelrtestack/a10_gx_pac_ias_1_2_pv/hw/samples/hello_afu
following the instructions provided in the README file.
I get the following error:
Error (19877): Partial reconfiguration no longer supports synthesis revisions
Error: Flow failed:
Error: Quartus Prime Synthesis was unsuccessful. 2 errors, 9 warnings
How can I fix that?
Regards
4 Replies
GDUFO2Side Note: The server is configured with following Quartus version:
Info: *******************************************************************
Info: Running Quartus Prime Shell
Info: Version 18.1.0 Build 222 09/21/2018 SJ Pro Edition
- RichardT_altera
Super Contributor
Sharing your design and the readme file may help to further understand.
You could refer to below KDB and check whether the workaround works for your case.
- GDUFO2
Hi Richard,
Any news on that topic?
Best
