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GDUFO2
New Contributor
6 years agoError (19877): Partial reconfiguration no longer supports synthesis revisions when trying to synthesize example design
Hi, On my Intel DevCloud FPGA server, I trying to synthesize the following example: /opt/a10/intelrtestack/a10_gx_pac_ias_1_2_pv/hw/samples/hello_afu following the instructions provided in the REA...
GDUFO2
New Contributor
6 years agoSide Note: The server is configured with following Quartus version:
Info: *******************************************************************
Info: Running Quartus Prime Shell
Info: Version 18.1.0 Build 222 09/21/2018 SJ Pro Edition