Occasional ContributorFollowing an old question (https://forums.intel.com/s/question/0D50P00004MInzpSAD/double-pumping-dsp-units-ip) is there any way to allow double pumping of DSPs in Stratix 10 and to exploit this directly in OpenCL?
Thanks
Frequent ContributorThe OpenCL compiler does not support DSP double-pumping and in fact, even Block RAM double-pumping that was supported for older FPGAs (Stratix V and Arria 10) has been disabled for Stratix 10. Even though this would be a very useful feature since kernels on Stratix 10 tend to run at far lower frequencies than the promised 800-900 MHz, seeing how even the existing Block RAM double-pumping was disabled for Stratix 10, I would not expect DSP double-pumping to ever be supported. The option to implement DSP double-pumping manually in RTL and using it as an RTL blackbox in OpenCL theoretically exists, but it won't be easy to implement and I am not sure if the OpenCL compiler provides a 2x clock on Stratix 10 anymore (or at all).
Super ContributorLet me get engineering to look into this for S10. Since feature can increase the Fmax.
Super ContributorDouble pumping does work on S10. You can apply the attribute doublepump to request double pumping for a given array. Will request to have it on dsp for the future. Thanks
Occasional ContributorThanks!
In your opinion, would it be possible to implement it as RTL block? Does OpenCL compiler/designs provide everything that I would need for that?
I could not find any useful documentation for this.
Thanks
Frequent Contributor@KennyT_Intel This is not true, Section 10.3 of the documentation (https://www.intel.com/content/www/us/en/programmable/documentation/mwh1391807516407.html#jhl1520273455239) clearly states that no 2x clock is provided in the design by the compiler for Stratix 10 and hence, Block RAM double-pumping is not available on Stratix 10. This also means that any type of double-pumping cannot be implemented by the user in RTL either since there is no 2x clock in the system generated by the compiler.
Super ContributorThanks for pointing out, the attribute doublepump for Startix 10 should be working. The compiler may not infer double-pumping my default, but the attribute should always be able to override that.
Will have this documentation corrected.
Super ContributorYou can refer to https://www.intel.com/content/www/us/en/programmable/documentation/mwh1391807516407.html#chn1469549457114__section_or3_mk2_5w -> Double Pumping
You will find an example there.
Occasional ContributorThanks, but my question was related to DSP Double Pumping, not to BRAM Double Pumping. The Intel documentation mention only the latter.
Super ContributorAs of now, we do not have DSP double pumping, I had make a request for the engineering to have it in the future. Thanks
