Most RecentVSIM 3033 (MODELSIM ALTERA) ERROR FFT IP COREGetting Synthesis Error due to undefined Macros In quartus pro 18.0Can I change weak pull up status of a FPGA pin during runtime?Compilation freezes at 2% when compiling verilog codeHow can I disable or connect a module in a Qsys systemIs there a way to write the original Linux booting file on the microSD provided with the DE10 Nano board?How do I add Xilinx FPGA family to Quartus II Web Edition?Error: attribute takes one argument - What can solve?I have created the Block Diagram file "Light Controller " and tried with Functional simulation. I have created the waveform and when i Run the Functional Simulation, I am getting the error and details are attached below. Requesting to solve this problem.When using "dual compressed image" onfiguration scheme, ROM cannot be used in the design, since you get Error 16031. This makes many hw design unusable (i.e. fast decoders, sensor calibration tables etc.) Is there a solution/fix for this?
