Recent Discussions
Cgi error in boa
Hello everyone. I've read all the topics about cgi scripts in boa. when i try to do a simple submit button tha will call a cgi script the server "thinks" writes: web site found, waiting for replay and then show me an error msg... but when i try to run the script directly from IE i see the text that it should return and it is working... (ony the scipt works) can someone help me...? my html file : <form method="post" Action="http://192.168.0.20/cgi-bin/test.cgi"> <input type="submit" value="ok"> </form> my cgi file:# include <stdio.h> void main(void) { printf("content-type: text/html\n"); printf("\n"); printf("the cgi script is working\n); exit(0); } my error : the page cannot be displayed cannot find server or dns server tnx alot guys AsiAltera TSE driver and example program for lwIP (1.3.2)
After many many requests and complaints about lack of support and/or documentation for support of lwIP for the Altera TSE, I have developed a drop-in TSE driver and example program and made this available to the NIOS II community. This was done for NIOS II 8.1 SP0.01. I don't expect difficulty with version 9.x. This is for the latest version of lwIP (the latest is as of this post) for a minimal program and HTTP server based on the http server in the lwIP contrib folder. The lwIP TSE driver uses the altera_avalon_tse driver and SGDMA as-is. There is a complete (as in 41-step) set of instructions on creating the project and example program. More information and the link to the driver is available here: http://lwip.wikia.com/wiki/available_device_drivers#lwip_1.3.2 Please direct any questions, changes for NIOS II 9.1, or comments to this thread. 12-16-2010 update: This example works with NIOS Version 10.0 with some tweaks to the procedure to create the project. Also, a lwIP 1.4 release candidate has been out for a while and it drops into this example (in place of 1.3) without changes. Billcgi-bin pb
Hello I have a problem with a script CGI I do a kernel, a file system and my application like the documentation. No problem for compilation. No probleme for upload the kernel and the filesystem with my Index.html and my script CGI. I have my web page OK, but the script not respond or i have a blanck page... any body know why ? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/mad.gif thanks http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/biggrin.gif Pascal FougerayNIOS SDRAM performance
I have measured the speed of memcpy's of NIOS2. I use optimized code consisting of four consecutive READs and four consecutive write accesses. Code snippet: while (i--) { d0 = __builtin_ldwio(pfrom); d1 = __builtin_ldwio(pfrom+1); d2 = __builtin_ldwio(pfrom+2); d3 = __builtin_ldwio(pfrom+3); pfrom+=4; __builtin_stwio(pto, d0); __builtin_stwio(pto+1, d1); __builtin_stwio(pto+2, d2); __builtin_stwio(pto+3, d3); pto+=4; } Compiling this with -O3 will yields quite optimal code with four reads to different regs and for writes: movhi r7, %hiadj(1048576) # pfrom addi r7, r7, %lo(1048576) # pfrom movhi r6, %hiadj(1052672) # pto addi r6, r6, %lo(1052672) # pto movi r8, 15 # i .L25: ldwio r3, 0(r7) # d0, * pfrom ldwio r4, 4(r7) # d1 ldwio r5, 8(r7) # d2 ldwio r9, 12(r7) # d3 addi r7, r7, 16 # pfrom, pfrom stwio r3, 0(r6) # d0, * pto stwio r4, 4(r6) # d1 stwio r5, 8(r6) # d2 stwio r9, 12(r6) # d3 addi r8, r8, -1 # i, i cmpnei r3, r8, -1 # i addi r6, r6, 16 # pto, pto bne r3, zero, .L25 The transfer rates seemed too slow, so I did further investigations. It turns out that NIOS2 has a very poor SDRAM read performance because it does not perform consecutive SDRAM read accesses (but it does for write accesses). Here's a link to an oscilloscope image of a READ access: oscilloscope: sdram read (http://dziegel.free.fr/nios2/sdram_read.jpg) However, write access seems to be fine: oscilloscope: sdram write (http://dziegel.free.fr/nios2/sdram_write.jpg) Note: As you can see in the oscilloscope images, the accesses to not cross a SDRAM row (no RAS cycle between reads). Tests were performed on a NIOS 1C20 Development Kit, Project: NIOS2 full_featured. So my questions are: - What are the reasons for the slow read performance? IMHO, the read requests could be executed in the same speed than the write requests. - Will this behaviour be changed / fixed? Thank you, DirkAccessing SDRAM from program in OCRAM in Debugging
Hello, I am using the Cyclone V SoC development board in a project that will be using the HPS system. I have been struggling to get the board working in the way I expect it to. My current issue is that I am not sure how to access the SDRAM while running a program from the OCRAM when using the debugger. There don't seem to be guides specifying how to do this specifically. I think the way I have it configured now places the program into the SDRAM and runs from there, but I can't say for certain that this is happening. I can access some addresses in the SDRAM range by just reading and writing to that memory location, but not for many; after a few this just returns garbage and eventually hangs the whole system. I attempted to run the sample project "Altera-SoCFPGA-HardwareLib-DMA-CV-GNU" and it always fails setting up data for the second test. I'm sort of at a loss and any assistance with understanding 1) how to access that portion of the memory map properly and 2) how to specify where to run programs when using the debugger would be greatly appreciated.SRAM vs SDRAM
Hi, I am about to design a system with uClinux, and I was wondering if the performances would be correct if I only used an SDRAM. SRAM is a bit expensive if I want to have enough memory to run my linux (I guess I need at least 4MB). However, I have read in some threads around here that SDRAM performances were quite bad. Is there any experience here of people running linux without SRAM ? My second question is quite the same and about the Altera Cyclone devboard : I use the standard design (using SRAM as exception address thus), and I follow the Quick Start Guide to build a kernel, that I run from the SDRAM. In this case, I suppose the whole kernel is uploaded in SDRAM and then executed from there. My question is : is the SRAM still in use ? Do I lose any performance if I remove it ? I can see that ramfs file systems are mounted but I guess its only in SDRAM. I suppose the /dev/ramX are linked to the SDRAM, not the SRAM, so is the SRAM in use ? Thanks a lot ceticNIOS beginner- interfacing with hardware module
Hello! I am an absolute beginner in NIOS and would really appreciate if someone can help me with some advice with the following: I have a working hardware module synthesized in FPGA. I actually need to tell the hardware to initiate its process and give me the result once it is done. As usual during pre-silicon phase, I created a testing environment to do this. However now as it is in the hardware, I need to have something else to talk with it. I was planning to make a qsys component of it and interface with a very basic and dumb software which will just give the initiation trigger to my hardware module and once result is ready, it will read it from the hardware. I have only 1-2 days to make this software interface as my project deadline is approaching. Hence, if anyone can refer me to any tutorial or any sample program which does the above (I can adapt it for my need) or any advice about how can I start implementing it then it will be really really helpful. I just need to have this software interface just to initiate the process in hardware and get result back once it is done. Btw, I am using stratix V fpga.Downloading ELF Process failed!
I am running NiosII IDE on my windows 7 professional laptop. When I first create a sopc project and complie and download *.sof into target board, then I also create a demo NiosII project "Hello world!" and debug it normally. Howerver, after I close NiosII IDE and restart it, I cann't debug it anymore eventhrough I don't change anything in both Quartus and sopc. It gives me a prompt that "Lanching hello_test Nios II hardware configuration has encourntered a problem. Downloading ELF Process failed". No matter I restart my laptop or power off my target board, it doesn't work! If I rebuild a new same sopc project and rebuild a new same NiosII project, it can work.But there is the same problem if I close it and restart it again. Please help me!:confused::confused::confused: