Recent Discussions
Quartus 20.1 NIOS II ED error: Makefile:1010: recipe for target '***.elf' failed
I have just migrated from 18.1 to 20.1 Lite. I am working on a W10 machine and have installed WSL, Ubuntu, etc. NIOS II SBT is running and I was able to create a new project from template as instructed. I created a project using the "Small Hello World" template. The application and bsp projects were created. Cleaning and building the bsp project works well as does clean the application project. However, when I try to build the application project, I get the following error - 10:03:31 **** Build of configuration Nios II for project test_20_1_7 **** wsl make all wslpath: hal_bsp: No such file or directory Info: Building /mnt/c/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/ make --no-print-directory -C /mnt/c/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/ [BSP build complete] Info: Compiling hello_world_small.c to obj/default/hello_world_small.o nios2-elf-gcc.exe -xc -MP -MMD -c -IC:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/HAL/inc -IC:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp -IC:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/drivers/inc -pipe -D__hal__ -DALT_NO_C_PLUS_PLUS -DALT_NO_CLEAN_EXIT -D'exit(a)=_exit(a)' -DALT_NO_EXIT -DALT_USE_DIRECT_DRIVERS -DALT_NO_INSTRUCTION_EMULATION -DALT_USE_SMALL_DRIVERS -DSMALL_C_LIB -DALT_SINGLE_THREADED -Os -g -Wall -mno-hw-div -mno-hw-mul -mno-hw-mulx -mgpopt=global -o obj/default/hello_world_small.o hello_world_small.c Info: Linking test_20_1_7.elf nios2-elf-g++.exe -T'C:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/linker.x' -msys-crt0='C:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp/obj/HAL/src/crt0.o' -msys-lib= -LC:/a_Nightowl/wds2hdmi/rtl/qsys/software/test_20_1_7_bsp -msmallc -Wl,-Map=test_20_1_7.map -Os -g -Wall -mno-hw-div -mno-hw-mul -mno-hw-mulx -mgpopt=global -o test_20_1_7.elf obj/default/hello_world_small.o -lm -msys-lib=m nios2-elf-g++.exe: error: missing argument to '-msys-lib=' make: *** [test_20_1_7.elf] Error 1 Makefile:1010: recipe for target 'test_20_1_7.elf' failed 10:03:34 Build Finished (took 2s.438ms) I have no idea what this error means. Can any one help me?
NIOS II Simple Socket Server and 10GbE example
Hello, I would like to know if there's an example of the Simple Socket Server example project, firmware and/or gateware, to use with an 10G Ethernet core. I currently use this setup but with a 1G link (TSE core), but I want to upgrade the project to use 10G or possibly more on my Stratix V GX board. I use Quartus 18.0. Thanks in advance
Arria 10 dev kit boot via epcq - software not loading
hi I'm trying to boot a Nios ii processor from EPCQ flash. I followed the steps described in the following (page 252 and on): https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pdf I connected the reset vector to the EPCQ controller and the exception vector to a on chip memory: when I try to convert the sof + epcq hex to jic , and use 'absolute addressing': I get: why is this the address I'm seeing? when I choose 'relative path' (and insert the appropriate address) I can convert to JIC but the software does not load from flash (HW does). I think the issue is not with the software app itself since it does work when loading from JTAG. any ideas what the issue may be? thanks!Learning Linux and choosing best Linux for Altera Arria V SoC Kit
Hello all, Thanks to Altera for providing such a great platform for learning! I am new to Linux operating system. I want to learn it and use it for Altera Arria V SoC Kit (https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-arria-v-soc.html). Please suggest me how to start. Where can I learn basic Linux and start porting the Linux OS to Arria V SoC kit? How should I choose the best Linux OS for this kit? Thank you all in advance. Regards
Does app note AN706 apply to Arria10SoC?
Are you able to map an HPS IP Peripheral Signals to the FPGA fabric, such as a UART controller? In the case of Arria10SX Dev Kit, routing the DB9 RS232 port (of the FPGA fabric) to the HPS uart controller. (in addition to the usb-to-uart port connected to the HPS; requiring a 2nd uart) Seems I am able to choose if the signals are coming from FPGA or HPS dedicated/shared IOs in Platform designer --> HPS --> Pin Mux and Peripherals Tab. But found a similar post which is implying this is not possible for A10SoC and requires an fpga-hps bridge with corresponding IPs in the FPGA fabric. https://forums.intel.com/s/question/0D50P00003yyGafSAE/routing-hps-gpio-to-an-led-in-fpga-region?language=en_US Some clarification would be appreciated.
[RSU] Can't establish UART connection to perform remote system update on MAX10
FPGA: Max10 10M04SAE144 I want to perform a remote system update via UART on my MAX10 device. Tried to follow instructions from AN741 (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an741.pdf) and the youtube video (https://www.youtube.com/watch?v=KPWOpYQD_JM). I tried to match my settings and follow the video guide closely. Screenshots of my schematic and the connections in Platform designer are attached. I've converted the programming files and programmed the FPGA, but I can't establish a UART connection to perform the RSU. I toggled the nPulse pin, but whenever i send UART data, i get no response from the FPGA. Can you give any advice? Thanks in advance! Best regards
About MAX10(10M16SAU) and DP83848 communication with MII
Hi, I develop my FPGA board with 10M16SAU and DP83848. I want to execute the Simple Socket Server demo on my board. However My board cannot be gotten IP address(not responce ping from my PC. Both of static IP and DHCP are NG). My Nios II Console's outputs are as follows. --- InterNiche Portable TCP/IP, v3.1 Copyright 1996-2008 by InterNiche Technologies. All rights reserved. altera_eth_tse_init 0 prep_tse_mac 0 Can't read the MAC address from your board. We will assign you a MAC address. Please enter your 9-digit serial number. This is printed on a label under your Nios dev. board. The first 3 digits of the -->Created "Inet main" task (Prio: 2) Created "clock tick" task (Prio: 3) 123456789 123456789 Your Ethernet MAC address is 00:07:ed:ff:00:01 prepped 1 interface, initializing... tse_mac_init 0 List of PHY profiles supported (Total profiles = 5)... Profile No. 0 : PHY Name : Marvell 88E1111 PHY OUI : 0x005043 PHY Model Num. : 0x0c PHY Rev. Num. : 0x02 Status Register: 0x11 Speed Bit : 14 Duplex Bit : 13 Link Bit : 10 Profile No. 1 : PHY Name : Marvell Quad PHY 88E1145 PHY OUI : 0x005043 PHY Model Num. : 0x0d PHY Rev. Num. : 0x02 Status Register: 0x11 Speed Bit : 14 Duplex Bit : 13 Link Bit : 10 Profile No. 2 : PHY Name : National DP83865 PHY OUI : 0x080017 PHY Model Num. : 0x07 PHY Rev. Num. : 0x0a Status Register: 0x11 Speed Bit : 3 Duplex Bit : 1 Link Bit : 2 Profile No. 3 : PHY Name : National DP83848C PHY OUI : 0x080017 PHY Model Num. : 0x09 PHY Rev. Num. : 0x00 Status Register: 0x00 Speed Bit : 0 Duplex Bit : 0 Link Bit : 0 Profile No. 4 : PHY Name : Intel PEF7071 PHY OUI : 0x355969 PHY Model Num. : 0x00 PHY Rev. Num. : 0x01 Status Register: 0x00 Speed Bit : 0 Duplex Bit : 0 Link Bit : 0 INFO : TSE MAC 0 found at address 0x01083000 INFO : Multi Channel = No INFO : MDIO Shared = No INFO : MAC Type = 10/100 Mbps Small MAC INFO : MAC Address = 0x01083000 INFO : MAC Device = tse_mac_device[0] INFO : PHY National DP83848C found at PHY address 0x01 of MAC Group[0] INFO : PHY OUI = 0x080017 INFO : PHY Model Number = 0x09 INFO : PHY Revision Number = 0x0 INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] INFO : PHY[0.0] - Advertisement of 1000 Base-T Full Duplex set to 0 INFO : PHY[0.0] - Advertisement of 1000 Base-T Half Duplex set to 0 INFO : PHY[0.0] - Advertisement of 100 Base-T4 set to 0 INFO : PHY[0.0] - Advertisement of 100 Base-TX Full Duplex set to 1 INFO : PHY[0.0] - Advertisement of 100 Base-TX Half Duplex set to 1 INFO : PHY[0.0] - Advertisement of 10 Base-TX Full Duplex set to 1 INFO : PHY[0.0] - Advertisement of 10 Base-TX Half Duplex set to 1 INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Advertisement of 1000 Base-T Full Duplex set to 0 INFO : PHY[0.0] - Advertisement 1000 Base-T half Duplex set to 0 INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Checking link... INFO : PHY[0.0] - Link established INFO : PHY[0.0] - Speed = 100, Duplex = Full OK, x=0, CMD_CONFIG=0x01000000 MAC post-initialization: CMD_CONFIG=0x5000203 [tse_msgdma_read_init] RX descriptor chain desc (9 depth) created mctest init called IP address of et1 : 172.16.1.100 RX ERROR DHCP timed out, going back to default IP address(es) Simple Socket Server starting up [sss_task] Simple Socket Server listening on port 30 Created "simple socket server" task (Prio: 4) --- I changed the IPADDR0~3(0.0.0.0 -> 172.16.1.100) and the GWADDR0~3(0.0.0.0 -> 172.16.1.1) in simple_socket_sever.h. Other headers and sources are not changed form originals. I cannot figure out what's behind it... Please tell me any advices! Thanks,
