Most RecentStuck with alt_sld_fab file related error while generating GBS file for AFUHow do I integrate my RTL design with OpenCL kernel synthesis results into one AFU (one gbs file)?What SVM type does harp2 platform support?Multiple reflexive access from channelUnable to Compile OpenCL on Arria 10 GXRunning HARP example design returns error value -54.I want to send input to the USB port of the cyclone(FPGA) board with altera. Is there a megafunction applicable to altera?Confusing descriptions in the OpenCL Best Practice Manual on data alignmentOpenVINO benchmark application gets freeze/stuckHi guys, we got the PAC S10 board(D5005) and successfully ran the dma example on this board but we failed to add NIOS. Can please tell me how to add NIOS in PR region by using PAC card?
