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Re: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Thanks for the clarification on what you've tested! My system OS is RHEL 8.8 with huge pages info and intel_iommu active as defind in the docs: intel_iommu=on pcie=realloc hugepagesz=2M hugepages=200. OFS_ASP_ENV_NUM_HUGEPAGES is also set to 2048. I was running into "AER: Uncorrected" errors for a while, too, pointing at my PCIe port, but I think I fixed that by adding pcie_aspm=off to my grub config. It is certainly tricky to figure out where these errors are coming from, and I'll keep that in mind when making any custom edits moving forward, too. I am running into a new error now, however. It seems all data is writing properly to the FPGA, but reading back the elements is not working correctly. The new error log will be attached to this post - did you encounter anything like this? It's interesting that the lowest three numbers are as expected, but there is a "4" added to the first digit in the sequence. The transfer speeds also seem awfully low, so that is a point of concern as well. I appreciate your help and any insight you may have once more! I'll keep digging into things on my end.3Views0likes0CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, I followed the steps you laid out in your previous response: using 2 UDIMM modules, changing the Agilex 7 part number, copying over the emif_loc and top_loc files, then building the FIM and ASP. I ran into an initial problem caused by the hssi, where errors were thrown during FIM compilation regarding its source files, so I removed it from the final build. Additionally, the default configuration (1x16 1PF/1VF I believe) produced errors in the oneAPI ASP step, so I changed that to 2x8 with 1PF/1VF. My complete compilation command is as follows: ./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_2link_1pf_1vf.ofss iseries-dk:no_hssi Upon running "aocl diagnose acl0", however, I am seeing the same DMA errors I was encountering some time ago. The output will be attached to this response, but it is interesting to note that the number of VTP L2 hits and misses are not consistent across iterations of this command. As such, I am unsure where to go moving forward, really, since this issue went unresolved in my initial interactions with the Altera team in this forum post. Another interesting note is that I have to run this command as the root, otherwise I get the following errors: "Error allocating DMA buffer" "Error allocating write_fence buffer" I am curious if I messed up my system configuration, somehow, but I will look further into this. Do you have any advice on how to maybe alleviate the diagnosis errors that I'm seeing? Did you follow a similar pattern for building your FIM? Thank you! James Edit: I see now on the Altera site that oneAPI is discontinued in favor of their similar, SYCL-based "HLS IP Gen Compiler" (link)...1View0likes2CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Best of luck with your preparation and studies! I'm more than happy to have a chat sometime as well, I would be interested to hear your experience with these tools and platforms, and all that you've used them for. I've gone ahead and followed your brief three steps and am now building the FIM (fingers crossed) now that my schedule has calmed down a bit. I'll be sure to report back as to how things go, but I again greatly appreciate everything you've done!6Views0likes0CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, Apologies for my absence, I've been busy with the end of a semester and creating/defending my PhD proposal. Thank you for sharing this information! I'll go ahead and see about swapping out the memory sticks and following your steps to see if I can get them to work as well. For clarity, I follow those first two steps you lay out, copy the "emif_loc.tcl" and "top_loc.tcl" from the OFS 2024.3 Github and replace the pre-existing ones, then build the FIM and ASP? Or are the other 10 steps you outlined previously (removing north/south I/O, modifying the board_spec.xml, etc.) still needed? We're interested in using oneAPI for acceleration architectures on this FPGA, since oneAPI is (as far as I'm aware) what Altera is using for their HLS toolkit at this time. Best, James16Views0likes5CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, Thank you for the clarification! Sorry for the delay, I've been running into crashes during compilation that I think are memory related, so I'm currently waiting on a delivery of 128GB RAM. On one run, however, I did encounter a compilation error as shown below, but I'm thinking it may be due to a mistake I made when modifying the mem_ss.ip as you listed in step 2. Error (17045): Input port I of I/O input buffer primitive local_mem_wrapper|mem_ss_top|mem_ss_inst|mem_ss|hps_emif|hps_emif|arch|arch_inst|bufs_inst|gen_rzqin.ibuf is not connected. It must be driven by a top-level pin. File: /home/jbick/OFS/OFS_BUILD_ROOT/ofs-agx7-pcie-attach-slim/work_iseries-dk_minimal_fim/ipss/mem/qip/mem_ss/mem_ss/mem_ss_mem_ss_200_rod65uq/synth/ip/mem_ss_mem_ss_200_rod65uq/mem_ss_mem_ss_200_rod65uq_emif_0/altera_emif_arch_fm_191/synth/altera_emif_arch_fm_bufs.sv Line: 1138 Error: Failed to synthesize partition Once my RAM is delivered and installed, I will try the process once more and report the results! Thanks! James31Views0likes8CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, Amazing, thank you so much!! I'll try following these steps next time I am at my workstation, as I am currently barred by lots of snow. If you would be able to share your board model file, or just the entire repo as you offer for reference, that would be phenomenal. I am not deeply experienced with OFS, and much of this process is new to me, so I greatly appreciate your help. Best, James86Views0likes10CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, I had already implemented that patch before encountering these network errors, so that fix does not seem to apply to this case, thank you for the recommendation regardless! Any other suggestions would be greatly appreciated as I look towards potentially upgrading my system's RAM. Best, James43Views0likes0CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, Apologies for the confusion. I've been trying to build the slim 1x16 PCIe using the following command: ./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_1pf_1vf.ofss iseries-dk:null_he_lb,null_he_hssi,null_he_mem,null_he_mem_tg,no_hssi work_iseries-dk_minimal_fim But I've been running into a couple crashes and compilation issues after some time passes, notably an error stating: "Error: UNAVAILABLE: Network closed for unknown reason." This error has appeared several times at the same point in compilation, despite constant connection to my network via Ethernet cable. As such, I don't think it's a connectivity issue. Another user ran into this issue when compiling for an F-Series board (link), and their issue was resolved by upgrading system RAM to 96GB, so I am looking into possibly doing that as well. My current system uses an i7-12700K and 64GB of DDR4 RAM. If you have any other insight or advice, please let me know as I continue to troubleshoot this new issue for the 1x16 PCIe configuration! The complete compilation log is attached for reference. I'll keep you posted if anything advances on my end. Thank you! James26Views0likes2CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, I initially tried to build a 1x16 design, but ran into the SystemVerilog errors which are shown in the text file attached to this response. This issue was also discussed in a similar forum post (link). Building a 2x8 configuration design avoided these errors, which is why I've been using that style so far. Let me know what you think, or if there is a specific compilation script you would like me to run that may help solve these errors. Thank you! James32Views0likes4CommentsRe: Agilex 7 I-Series "aocl diagnose acl0" error following OFS
Hello, Thank you for checking the Quartus design! The OPN for the device on my board is AGIB027R29A1E1VB, and for reference the board was purchased at mouser with this link: https://www.mouser.com/ProductDetail/Altera/DK-DEV-AGI027-RA?qs=Znm5pLBrcAL6FowUR8Vkgw%3D%3D. I did make sure to update the part number within the configuration scripts as well, per the instructions in the guide. I did not modify any pin out information, however, as the default device also used an R29A package, so I assume that is okay. I did not yet try testing the FIM using an AFU developed in Quartus without oneAPI, but was going to look into that and basic reference designs next to validate functionality as you suggest. The command that I used to compile the FIM is as follows: ./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_2link_1pf_1vf.ofss iseries-dk:null_he_lb,null_he_hssi,null_he_mem,null_he_mem_tg,no_hssi work_iseries-dk_minimal_fim I followed the steps in the minimal FIM part of the OFS guide (https://ofs.github.io/ofs-2024.2-1/hw/iseries_devkit/dev_guides/fim_dev/ug_ofs_iseries_dk_fim_dev/#45-minimal-fim) to create a PCIe 2x8 1PF/1VF Minimal FIM. I look forward to hearing from you! James13Views0likes6Comments