New Contributor
Regular ContributorHi,
From the design, it looks good. May I know which exact OPN of the board that you are using? Have you tested with non-oneAPI AFU design to test if your FIM and AFU is working?
Can you also provide the command and script that you use to performed the full compilation?
New ContributorHello,
Thank you for checking the Quartus design! The OPN for the device on my board is AGIB027R29A1E1VB, and for reference the board was purchased at mouser with this link: https://www.mouser.com/ProductDetail/Altera/DK-DEV-AGI027-RA?qs=Znm5pLBrcAL6FowUR8Vkgw%3D%3D. I did make sure to update the part number within the configuration scripts as well, per the instructions in the guide. I did not modify any pin out information, however, as the default device also used an R29A package, so I assume that is okay.
I did not yet try testing the FIM using an AFU developed in Quartus without oneAPI, but was going to look into that and basic reference designs next to validate functionality as you suggest.
The command that I used to compile the FIM is as follows:
./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_2link_1pf_1vf.ofss iseries-dk:null_he_lb,null_he_hssi,null_he_mem,null_he_mem_tg,no_hssi work_iseries-dk_minimal_fim
I followed the steps in the minimal FIM part of the OFS guide (https://ofs.github.io/ofs-2024.2-1/hw/iseries_devkit/dev_guides/fim_dev/ug_ofs_iseries_dk_fim_dev/#45-minimal-fim) to create a PCIe 2x8 1PF/1VF Minimal FIM.
I look forward to hearing from you!
James
Regular ContributorHi,
Can you try the PCIe 1x16 design rather than 2x8?
New ContributorHello,
I initially tried to build a 1x16 design, but ran into the SystemVerilog errors which are shown in the text file attached to this response. This issue was also discussed in a similar forum post (link). Building a 2x8 configuration design avoided these errors, which is why I've been using that style so far.
Let me know what you think, or if there is a specific compilation script you would like me to run that may help solve these errors.
Thank you!
James
Regular ContributorHi,
Based on the link provided, the changes is on the RAM 2x8GB interface. The PCIe should be still possible to be configured with 1x16 interface.
New ContributorHello,
Apologies for the confusion. I've been trying to build the slim 1x16 PCIe using the following command:
./ofs-common/scripts/common/syn/build_top.sh -p --ofss tools/ofss_config/pcie/pcie_host_1pf_1vf.ofss iseries-dk:null_he_lb,null_he_hssi,null_he_mem,null_he_mem_tg,no_hssi work_iseries-dk_minimal_fim
But I've been running into a couple crashes and compilation issues after some time passes, notably an error stating: "Error: UNAVAILABLE: Network closed for unknown reason." This error has appeared several times at the same point in compilation, despite constant connection to my network via Ethernet cable. As such, I don't think it's a connectivity issue. Another user ran into this issue when compiling for an F-Series board (link), and their issue was resolved by upgrading system RAM to 96GB, so I am looking into possibly doing that as well.
My current system uses an i7-12700K and 64GB of DDR4 RAM. If you have any other insight or advice, please let me know as I continue to troubleshoot this new issue for the 1x16 PCIe configuration! The complete compilation log is attached for reference. I'll keep you posted if anything advances on my end.
Thank you!
James
Regular ContributorHi,
Can you try to implement the workaround in Why do I unexpectedly observe intermittent DDM Errors? | Altera Community - 349714?
New ContributorHello,
I had already implemented that patch before encountering these network errors, so that fix does not seem to apply to this case, thank you for the recommendation regardless! Any other suggestions would be greatly appreciated as I look towards potentially upgrading my system's RAM.
Best,
James
