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Baremetal Example SDMMC makefile failed
Hello, CycloneVsoc with BM environment, SOCEDS 20.1 and ARMDS 2021 I downloaded your bare-metal SDMMC sample, but the build failed when using ARMDS make. Here is the error message: make all arm-altera-eabi-gcc -g -O0 -Wall -Werror -std=c99 -mcpu=cortex-a9 -mfloat-abi=softfp -mfpu=neon -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -Dsoc_cv_av -c sdmmc_demo.c -o sdmmc_demo.o process_begin: CreateProcess(NULL, arm-altera-eabi-gcc -g -O0 -Wall -Werror -std=c99 -mcpu=cortex-a9 -mfloat-abi=softfp -mfpu=neon -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include -IC:/intelFPGA/20.1/embedded/ip/altera/hps/altera_hps/hwlib/include/soc_cv_av -Dsoc_cv_av -c sdmmc_demo.c -o sdmmc_demo.o, ...) failed. make (e=2) Before making I've point the SOCEDS_DEST_ROOT to my SOC path. And I've opened the embedded_command_shell. Thank you AlexFailed to debug the SMP cycloneVsoc boards
Hello, here are my project settings: It will initiate an RTOS. After the RTOS setup is completed, it will load the RBF file of my project using the "dc" method. It will start the SMP and then load two cores. However, when I use ARMDs for debugging, one （or both） of the cores will get suspended. The reason seems to be that some modules involved in FPGA communication fail to find the address after checking it. When I encounter this issue, I recompile the SOF project in Quartus to generate a new RBF file and then try debugging again with ARMDs. Sometimes this works, but most of the time, it still fails. I’ve also tried only recompiling my ARMDs project, but the debugging results are always the same after each recompilation. Therefore, the only variable is the Quartus Prime recompilation. Do you have any solutions for this? Yours AlexUsing Uart IP with HPS(Cyclone V soc dev board)
Hi I'm using HPS and want to use the UART IP to create a FPGA module to make a connection between the host and the board. Here is the system HPS : Buffer ====> | FPGA: Uart module ====> | TTL to RS232 module ====> | Host I've read the example of the RS232 Max Baurd rate example and the IP guide. I don't know if the HPS support this example for I DID NOT USE THE NOIS II. Instead I'm using the HPS with HWLIB. In HWLIB there is a 16550 uart API. Is that related to the RS232 IP? Is there an example for HPS? Is it allowed to reach the 921600 baud rate? thank you for your time Best Wishes AlexRe: Error using arm-eabi to make
Hi @khtan It seems the last upload was failed due to the connection. I found it would be not easy to upload again. About the question: The other HelloWorld.img is a prebuild image using arm-none-eabi toolchain. The difference of section names was made by this. Also, I've tried build HWlib example timer with arm-eabi toolchain. The format is normal as well. The vector table was at 0x00100040. So, I suspect that my Makefile was made incorrectly. By solving this, I just point to the different entry by mkimage -e <vector address in the objdump, in this case 0x00100068> -a 0x00100040. After that I changed my Makefile for my project. Could you give me a quick assumption of why it would happen? My linaro toolchain was downloaded with SOC EDS std 20.1 If you couldn't, please do whatever you need to this thread. Thank you for your help Regards AlexError using arm-eabi to make
Hi I'm using CycloneVsoc Dev Kit with QSPI boot. I've made a spl and the application image to boot. I found that the SPL can't find my application. So I tried another HelloWorld image. It works well. When I checked the objdump I found the format of the axf files are different. Here is the HelloWorld objdump: using arm-none-eabi tool chain And here is my project: using arm-eabi tool chain <downloaded with the SOC EDS> I also made a Timer Example, the format is the same as the HelloWorld one. I use the same linker file and the same flags, I don't know why it is different. Could you help me for that? I attached the Makefile I made and the source code.You may need to delete the gpio led part of the code. Best Wish AlexRe: Proper setting for Uboot/SPL
Now I'm using USM to communicate with the board, I can visit the emmc on /dev/sda. I loaded the image to /dev/sda but BootROM can't find out where SPL was and keep resetting. So how should I do to let the BootROM find the SPL? What changes need to be done in the SPL setting? What changes need to be done in the image making? Thank you. AlexBootrom debug ： failed to find spl in emmc CycloneVsoc
Hi I'm using a SoM based on cycloneVSOC. There is an EMMC. I want to boot from emmc flash with a SPL and a baremetal binary. I used the same build flow on rocketboards(HWLIB) to build my image. And use ums 0 mmc 0 to mount the emmcblk to /dev/sda. Then I used the order : dd if=SD_imga.img of=/dev/sda then reset. But it failed following is the reg from the sysmgr: Could you please tell me why it is failed? Reguards Alex
