ContributionsMost RecentMost LikesSolutionsRe: NicheStack can't initialize the PHY I am having the same issue and I signal taped the MDIO and MDC and they show connected fine. RX_CLK is fine but not getting anything on the TX_CLK. IF anyone can share how solve this issue, It would be greatly appreciated. WEB SERVER TX CLK SET UP Greeting community, I am trying to run a web server example on DE2115 dev board. for a long time now, I have had issue getting the tx clock from the Phy chiP (88e1111 I am wondering if anyone has the right set uP and is willing to share. much thanks Re: Getting an IP address Thank you for getting back to me. I have not resolved the issue. I suspect that I have an issue with the TSE MAC configuration. So, I am looking into that but no lock so far. Getting an IP address Hello Everyone. I have been working on this project for a while now for school work. I am using a TSE IP with MSGDMA using edition 18.1. The system builds ok and says that it is running. But I am trying to get an IP address display on the nios ii console but it remains blank. I have included my system from platform designer, and what I get when I ran the system. If anyone could help, it would be greatly appreciated. Thanks in advance. SYSTEM FROM PLATFORM DESIGNER SYSTEM FROM PLATFORM DESIGNER I get nothing when i run the system bsp editor Re: NIOS II IDE error I don't get the error anymore but after fixing that error, I get different errors. So, I decided to approach the problem differently including creating a whole new system. Re: NIOS II IDE error I tried the solution but I got into different issue. Maybe there is issue in my design that i am not aware of. I attached a photo of my platform designer picture of the system. Is there something I am missing? Price of FPGA CHIP I am writing a proposal for a research and I tried to find a price range for an FPGA chip (not the whole board, just the chip alone) so I can compare it to a micro controller. How can i get that information ? Thanks Regards NIOS II IDE error If anyone has gotten such error, Can you let me know how you fixed it? Much appreciated!!!! Re: FPGA IP cores I was able to get it into evaluation mode. I was uploading wrong .SOP file. Thanks for help thought when I am trying to run the project I get an error that says "downloading elf process failed" and I seem not to get the right help from the forum on how to get around this error. FPGA IP cores Hello intel community. I am new to FPGA development. I am a graduate student in Electrical Engineering and my project is to implement a system using the NIOS II Processor. I am confused about the licensing of the IP CORES and how to get them. Can someone please explain this to me. Are there any free options that I can use? Solved