Why is my IP license checked out and not released after using the Signal Tap Logic Analyzer?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3, you might see that an IP license is checked out and not released when using the Signal Tap Logic Analyzer. Resolution To work around this problem, use the standalone version of the Signal Tap Logic Analyzer. This problem is fixed beginning with version 26.1 of the Quartus® Prime Pro Edition SoftwareError: Tcl error: DVR_API: List of error MSGs are {list element in braces followed by "]" instead of space
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3.1, you might see this error when compiling your design in Design Space Explorer II. Error: Tcl error: DVR_API: List of error MSGs are {list element in braces followed by "]" instead of space (Command was: lmap panel_name [::qed_lib::rdb_util::get_report_panel_names_matching -panel_name {} -string_match {Synthesis||Logic Synthesis Stage||Partition*||*Optimization Results||Multiplier Implementations||Multiplier Implementation Report} -regexp_match {}] {::qed_lib::rdb_util::get_report_panel_str -panel_name $panel_name})} Resolution To work around this problem in the Quartus® Prime Pro Edition Software version 25.3.1, download and install patch 1.21 This problem is fixed beginning with version 26.1 of the Quartus® Prime Pro Edition Software.Why does my Quartus® Prime Installation fail with certificate error: SSL certificate problem: unable to get local issuer certificate (curlcode 60)?
Description Due to a problem in the Quartus® Prime Installer Software, you might see the error message shown below when you click Download & Install. This happens because the certificate bundled with the Quartus® Prime Installer Software is no longer accepted by the Altera® Content Delivery Network (CDN). As a result, secure downloads initiated during the installation process cannot be verified using the outdated certificate. The issue impacts the Installer for the following versions of Quartus software: Operating System Quartus Prime Pro Installer Version(s) Quartus Std/Lite Installer Version(s) Microsoft Windows* 23.3 to 25.3.1 23.1std to 25.1std Linux* 23.3 to 23.4 23.1std The KDB workaround provided below applies to the following versions of Quartus software: Quartus Prime Pro Installer Version(s) Quartus Std/Lite Installer Version(s) KDB workaround applies to 24.3 to 25.3.1 24.1std to 25.1std Note that for all other affected versions not covered by the KDB, you cannot use the installer workaround and must download Quartus software package files individually without using the installer. Separate packages can be found in the Individual Files tab of the Quartus Software Download pages. Resolution To work around this problem, follow these steps: 1. Download and unzip the cacert.zip, which contains the cacert.pem certificate file. 2. Specify the new certificate using one of the following methods: i) Command Line Interface (CLI): Open a command prompt or terminal and run the installer with the--cacert option, pointing to the new certificate file. Windows*: qinst_<version>.exe -sp"--cacert <full path to cacert.pem>" Linux*: qinst_<version>.run -- --cacert <full path to cacert.pem> ii) Graphical User Interface (GUI): - Open the Quartus® Prime Installer, navigate to Settings, locate the CA Certificate Path, and specify the full path to the cacert.pem certificate file. - Then, click Apply > OK. This problem is scheduled to be resolved in a future release of the Quartus® Prime Installer Software.Error: invalid command name "else"
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3.1 and earlier, you might see the error messages below when generating a VHDL simulation model in Platform Designer that includes the Remote Update IP. Error: invalid command name "else" Info: while executing Info: "else { Info: do_vhdl_sim_cbx altera_remote_update_core Info: }" Info: (procedure "do_vhdl_sim" line 8) Info: invoked from within Info: "do_vhdl_sim altera_remote_update_core" Error: Generation stopped, 1 or more modules remaining Resolution To work around this problem, generate Verilog Simulation Model for Remote Update IP. This problem is fixed beginning with the Quartus ® Prime Pro Edition Software version 26.1.
Why does Nios® V processor system simulation fail with no print-out message and multiple “x” values along the processor’s signals?
Description This problem may be seen in the Synopsys* VCS* and VCS* MX simulators when simulating the Nios® V processor system generated from Quartus® Prime Pro Edition Software version 23.1 to 23.4, or Quartus® Prime Standard Edition Software version 23.1std This is due to the X-propagation support in the simulators. Resolution To workaround this problem, follow these steps: Switch off the X-propagation feature on the processor core, Generate testbench system from the Platform Designer. Navigate into the Synopsys* simulator directory. $ cd <Project>/sys_tb/sys_tb/sim/synopsys Append -xprop=xpropconfig into the shell script in the vcs or vcsmx folder. For example: USER_DEFINED_ELAB_OPTIONS=”-xprop=xpropconfig” Create a file named xpropconfig in the vcs or vcsmx folder (beside the shell script). Copy the following text into xpropconfig, and change the processor entity name. tree {<Nios V processor HDL entity name>} {xpropOff}; Run the simulator. This problem is currently scheduled to be resolved in Quartus® Prime Pro Edition Software version 24.1 and later.Why do I get the error Internal Error "No Active Family" when trying to generate a programming JAM file via command line "quartus_pfg"
Description When trying to generate a JAM programing file (.jam) via the quartus_pfg command line from a Chain Description File (.cdf). quartus_pfg -c <file>.cdf <file>.jam You may get the following error message: Internal Error: Sub-system: PGMIO, File: /quartus/pgm/pgmio/pgmio_jam.cpp, Line: 2873 No Active Family Stack Trace: Quartus 0x3cce3e: PGMIO_JAM::jam2_filter(int, PGMIO_JTAG_UNI_ENGINE*, std::basic_ifstream >&, std::ostream&) + 0x582 (pgm_pgmio) Quartus 0x3d0a7a: PGMIO_JAM::jam2_create_file(int, PGMIO_JTAG_UNI_ENGINE*) + 0x846 (pgm_pgmio) Quartus 0x3d4ec2: PGMIO_JAM::create_output_file(std::vector >*, FIO_PATH const&, bool) + 0x3e8c (pgm_pgmio) This error may be due to an issue were the source programming files on the .cdf file not being valid. Resolution To work around this problem, verify your programing source file or files with the following command line: quartus_pfg -i <source>.sof This command will help you determine if your source file or files are valid and invalid and provide additional info on the issues with the invalid files for troubleshooting. Replace the invalid files with valid ones once identified. The problem has been fixed starting with Quartus® Prime Pro Edition software version 26.1.Why is the value of my VERILOG_MACRO QSF assignment incorrect?
Description Due to a problem in the Quartus® Prime Pro Edition software version 23.4 and later, the last assignment of a specific VERILOG_MACRO may take the value of a previous VERILOG_MACRO assignment. Resolution To work around this problem, download and install the patch for your Quartus® Prime Pro Edition Software version from the following links: Patch 0.29 for the Quartus® Prime Pro Edition Software version 24.3 for Windows and Linux (.zip) Patch 1.27 for version Quartus® Prime Pro Edition Software version 24.3.1 for Windows and Linux (.zip) Patch 0.18 for version Quartus® Prime Pro Edition Software version 25.1 for Windows and Linux (.zip) Patch 1.01 for version Quartus® Prime Pro Edition Software version 25.1.1 for Windows and Linux (.zip) For other versions, do not use a specific VERILOG_MACRO QSF assignment more than once. This problem is fixed beginning with the Quartus® Prime Pro Edition software version 25.3./quartus/pgm/bitasm/bitasm_bitstream_encryption.cpp, Line: 1439 Expected the extra routing value(8) to be 0 or 4.
Description Due to a problem in the Quartus ® Prime Pro Edition Software version 25.3, this error message might be displayed when generating an encrypted FPGA bitstream file using the quartus_pgm tool. This problem only affects some FPGA bitstream files. Resolution This problem is fixed beginning with version 26.1 of the Quartus® Prime Pro Edition Software.Why does the quartus_pfg tool hang when generating an encrypted bitstream file?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3.1 and earlier, the quartus_pfg tool may hang indefinitely while generating an encrypted bitstream file. This is an intermittent problem. Once it occurs for a specific FPGA bitstream, it will always occur for that bitstream. Resolution A patch is available to fix this problem for the Quartus ® Prime Pro Edition Software version 25.3.1. Download and install patch 1.18 This problem is fixed beginning with version 26.1 of the Quartus® Prime Pro Edition Software.Why does the SDMMC_PinMuxing revert to N/A after clicking on the Apply selection on the Advanced FPGA placement Tab, but not on other tabs?
Description Due to a problem with the Quartus® Prime Pro Edition Software version 25.3, changes made in the "Advanced IP Placement" Tab will be overwritten when clicking on the "Apply Selection" in the "Advanced FPGA Placement" Tab. The error message below will appear after clicking on the "Apply selection" on the Advanced FPGA placement. "SDMMC selection detected on HPS I/O, but SDMMC_PinMuxing is set to Unused. SDMMC_PinMuxing must be set to "IO" when enabled on HPSI/O." Resolution To work around this problem, apply your changes first to the "Advanced FPGA Placement " Tab before applying your changes to the "Advance IP Placement" Tab. Additional Information The problem has been fixed starting with Quartus® Prime Pro Edition software version 25.3.1.
