Why does my Quartus® Prime Installation fail with certificate error: SSL certificate problem: unable to get local issuer certificate (curlcode 60)?
Description Due to a problem in the Quartus® Prime Installer Software, you might see the error message shown below when you click Download & Install. This happens because the certificate bundled with the Quartus® Prime Installer Software is no longer accepted by the Altera® Content Delivery Network (CDN). As a result, secure downloads initiated during the installation process cannot be verified using the outdated certificate. The issue impacts the Installer for the following versions of Quartus software: Operating System Quartus Prime Pro Installer Version(s) Quartus Std/Lite Installer Version(s) Microsoft Windows* 23.3 to 25.3.1 23.1std to 25.1std Linux* 23.3 to 23.4 23.1std The KDB workaround provided below applies to the following versions of Quartus software: Quartus Prime Pro Installer Version(s) Quartus Std/Lite Installer Version(s) KDB workaround applies to 24.3 to 25.3.1 24.1std to 25.1std Note that for all other affected versions not covered by the KDB, you cannot use the installer workaround and must download Quartus software package files individually without using the installer. Separate packages can be found in the Individual Files tab of the Quartus Software Download pages. Resolution To work around this problem, follow these steps: 1. Download and unzip the cacert.zip, which contains the cacert.pem certificate file. 2. Specify the new certificate using one of the following methods: i) Command Line Interface (CLI): Open a command prompt or terminal and run the installer with the--cacert option, pointing to the new certificate file. Windows*: qinst_<version>.exe -sp"--cacert <full path to cacert.pem>" Linux*: qinst_<version>.run -- --cacert <full path to cacert.pem> ii) Graphical User Interface (GUI): - Open the Quartus® Prime Installer, navigate to Settings, locate the CA Certificate Path, and specify the full path to the cacert.pem certificate file. - Then, click Apply > OK. This problem is scheduled to be resolved in a future release of the Quartus® Prime Installer Software.Why does the text overlap in the ALTPLL IP Parameter Editor?
Description Due to a problem in the Quartus® Prime Standard Edition Software version 25.1, you might see that the text overlaps in the ALTPLL IP Parameter Editor on the Windows* Operating System. This prevents the ALTPLL IP from being instantiated. This problem does not occur in the Quartus® Prime Standard Edition Software version 24.1 and earlier. Resolution To work around this problem in the Quartus® Prime Standard Edition Software version 25.1, download and install the patch below: This problem is scheduled to be resolved in a future release of the Quartus® Prime Standard Edition Software.
What is the MDIO clock to output data maximum specification for Cyclone V SOC and Arria V SOC devices?
Description MDIO clock to output data maximum specification (Td Max) for the HPS Ethernet MAC on Cyclone® V SOC and Arria® V SOC devices is 20ns. This information is scheduled to be added to a future version of the Cyclone V SOC and Arria V SOC device datasheets.Can a 9-transceiver channel Arria V GT device support an Rx only channel that already has four 6.144-Gbps duplex or Tx channels?
Description No, a 9-transceiver channel Arria® V GT device cannot support an Rx only channel that already has four 6.144-Gbps duplex or Tx channels. Due to a bug in the Quartus® II software versions 13.1 and earlier, the Fitter will not produce an error message for the configuration above. Resolution This problem is fixed in Quartus II software version 13.1 and an error message is produced with the above illegal configuration.Error: TBBmalloc: skip allocation functions replacement in ucrtbase.dll: unknown prologue for function _msize
Description Due to a problem in the Quartus® Prime Standard Edition Software version 24.1 or earlier, you may see this error message when generating Altera® IP on the Windows* 11 OS (Operating System). Resolution To work around this problem, follow these steps: Go to This PC, right-click, and select Properties. Click Advanced System Setting. In the Advanced tab, select Environment Variable. Under System variables, create a new variable with the name TBB_MALLOC_DISABLE_REPLACEMENT and value as 1. Click OK and restart the Quartus® Prime Software.Does the Advanced clock phase control adjustment in the HPS DDR3 work?
Description You may notice the Advanced clock phase control setting in the HPS GUI PHY Settings tab. Changing the phase value has no effect on the phase of the PLL output clocks. Resolution The Advanced clock phase control adjustment will be removed in a future version of the Quartus® II software. This problem was fixed in Quartus® II software version 13.1Error : FLEXlm version of vendor daemon is too old
Description In the Questa* FPGA Edition simulator and Questa* FPGA Starter Edition simulator version 2024.1, you might see this error or the following error if you are using the MGCLD daemon v11.16.4 “Unable to checkout a license. Make sure your license file environment variable (SALT_LICENSE_SERVER, MGLS_LICENSE_FILE, LM_LICENSE_FILE) is set correctly” Resolution To avoid this error, upgrade to the Siemens* Flexlm (SALTD) daemon v11.19.5 Download the daemon from the download page There is a change to the Siemens* License in v11.19.5.0. If you’re running a floating license server for Siemens* licenses, manually change the VENDOR daemon line in the license file from mgcld to saltd, for example: VENDOR saltd <path to saltd> Note: Do not change any of the INCREMENT lines. Leave the INCREMENT lines with the original vendor daemon name (mgcld).Why does Linux report "DMA engine initialization failed" error when EMAC uses GMII interface?
Description When supporting GMII interface for HPS EMAC, there are three clocks exported to FPGA: emac_tx_clk_i(input), emac_rx_clk_i(input), emac_gtx_clk(output) The Linux would report below error if the emac_tx_clk_i clock is not connected correctly: ...... [ 4.291414] socfpga-dwmac ff802000.ethernet: Failed to reset the dma [ 4.297785] socfpga-dwmac ff802000.ethernet eth1: stmmac_hw_setup: DMA engine initialization failed [ 4.306806] socfpga-dwmac ff802000.ethernet eth1: stmmac_open: Hw setup failed ...... Resolution Besides connecting the emac_rx_clk_i(125MHz) for GMII, the emac_tx_clk_i also needs to be connected correctly (2.5MHz or 25MHz), although it is not used in GMII mode. The emac_tx_clk_i requirement information has been added in the HPS document beginning with version 21.2.cc1plus.exe: out of memory allocating 65536 bytes
Description This error may be seen when compiling large software projects on Windows platforms. cc1plus.exe is a 32bit Windows application and has access to 2GB of memory on Windows. Resolution To work around this problem, Windows can be configured to allow 32bit applications access to a 3GB address space. 1. Enable 3GB address space for 32bit applications on Windows: From Windows command prompt run: bcdedit /set IncreaseUserVa 3072 2. Allow cc1plus.exe to use the larger address space From Windows command prompt run: editbin /LARGEADDRESSAWARE "<path>/cc1plus.exe“ This problem is scheduled to be fixed in a future release of the SoC EDS Software.
