Valid substitute to EN5396QI-T
Goodmorning everyone, I am trying to find valid alternative to EN5396QI-T, EN5366QI and EN5337QI-T, which are now obsolete. I must ensure both the same output current, switching frequency and low input voltage. The substitute must have the integrated inductor too. Do you know any valid alternatives? At the moment, the best I found are the MPS DC-DC converters, but unfortunately they do not reach 5MHz of switching frequency. Thank you all for the attention, Best regards, Andrea B.1.2KViews2likes4CommentsI350 igb driver failed with error -2
Dear Support, My setup is the following, I have a I350 connected to an arm based board (Jetson) over PCIe. On port0 of the I350 there is an external PHY (DP83TG721) connected over SGMII (rx/tx and MDIO). The external PHY is needed for automotive Ethernet. I got the EEPROM Access tool and the accompanying flash images. The I350 gets discovered as a PCIe device and I'm able to flash it using the EEPROM tool. When trying the I350_2-4port_Copper_NO-MNG_1_63 flash image. The igb driver loads correctly and 4 working network interfaces appear, nice. But the goal is to also get the external PHY working. When trying the I350_2-4port_SGMII_NO-MNG_1_63 flash image for SGMII connection with the PHY the driver fails to load nvidia@nvidia-desktop:~$ sudo dmesg | grep igb [ 0.217490] igb: Intel(R) Gigabit Ethernet Network Driver [ 0.217495] igb: Copyright (c) 2007-2014 Intel Corporation. [ 0.217520] igbvf: Intel(R) Gigabit Virtual Function Network Driver [ 0.217526] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. [ 14.102105] igb 0005:01:00.0: Adding to iommu group 57 [ 14.102411] igb 0005:01:00.0: enabling device (0000 -> 0002) [ 14.755600] igb: probe of 0005:01:00.0 failed with error -2 [ 14.757712] igb 0005:01:00.1: Adding to iommu group 57 [ 14.757927] igb 0005:01:00.1: enabling device (0000 -> 0002) [ 15.074173] igb: probe of 0005:01:00.1 failed with error -2 [ 15.074709] igb 0005:01:00.2: Adding to iommu group 57 [ 15.074889] igb 0005:01:00.2: enabling device (0000 -> 0002) [ 15.815347] igb: probe of 0005:01:00.2 failed with error -2 [ 15.815633] igb 0005:01:00.3: Adding to iommu group 57 [ 15.815756] igb 0005:01:00.3: enabling device (0000 -> 0002) [ 16.556610] igb: probe of 0005:01:00.3 failed with error -2 While the driver fails the I350 remains discoverable on PCIe nvidia@nvidia-desktop:~$ sudo lspci -v ... 0005:01:00.0 Ethernet controller: Intel Corporation I350 Gigabit Connection (rev 01) Flags: fast devsel, IRQ 203, IOMMU group 57 Memory at 2b28000000 (32-bit, non-prefetchable) [size=128K] I/O ports at 200000 [disabled] [size=32] Memory at 2b28080000 (32-bit, non-prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ Capabilities: [70] MSI-X: Enable- Count=10 Masked- Capabilities: [a0] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting Capabilities: [140] Device Serial Number 02-00-00-ff-ff-aa-bb-cc Capabilities: [150] Alternative Routing-ID Interpretation (ARI) Capabilities: [160] Single Root I/O Virtualization (SR-IOV) Capabilities: [1a0] Transaction Processing Hints Capabilities: [1c0] Latency Tolerance Reporting Capabilities: [1d0] Access Control Services ... What could be causing the igb driver to fail when using the SGMII config? To communicate with the external PHY I want to use the MDIO pass-through, are there any additional steps needed to configure this ? Thank you for any support and insight685Views1like2CommentsMAX10 FPGA design : some questions about clock and other aspects
Hi all, finally I'm doing my first FPGA design (after tons with simpler CPLDs) I'm targeting a MAX10 FPGA (10M08SCE144C8G is the exact part name).The design will be a kind of replacement installed on an old computer (mostly made with TTL logics).I have read the Intel® MAX® 10 guidelines and I want to feed the FPGA with a 6MHz clock signal coming from the old TTL hosting hardware.Should I simply connect this signal to one of the clock input of the MAX10 FPGA (for example pin 27 CLK0p like I did it in my schematics which I attach, it's missing the level shifters for proper 5V to 3.3VV translation though) or connect the signal to all 8 clock inputs CLK[3..0][p,n] so that they can drive all GCLK networks?Thanks in advance for any help or suggestion.852Views1like4CommentsNon-BGA, marking
To Whom It May Concern. Could you please help me with the marking of the component EPF10K50EQI240-2? The top is marked with Q DCF651725A, so it's manufactured in the 2017, when it became EOL. But there is no lot or date code. I have found the document (CUSTOMER ADVISORY ADV0201), that says there may not be date/lot code. Is it correct? Respectfully, Arthur699Views1like3CommentsIntel Open FPGA stack
Hey all, I am a beginner in FPGA development and I have never used Quartus before. I'll be building on the N6000-PL card from Intel which does not have any image preinstalled, so I have to use the Intel OFS repo to compile the project and then build the AFU for the card. Does the Intel OFS need a Linux based system to be compiled? What are the steps i need to follow if i am to do it in Windows? Thank you for the help.Solved2.4KViews1like6Comments10M08SCE144C8G Temperature Issues
Hi, We're having some wird temperature issues with some newer 10M08SCE144C8G FPGA chips date marked with "2301A". The FPGA chips are used in an older MUX design "which have always worked before". Some of the "2301A" chips, however, does not operate as normal at 25C room temperature. However, if we apply external heating they suddenly start working as normal at arond 35-50C. Looking at some of our older circuits boards without temperature problems, with FPGA chips date marked "2007A", I cannot help notice the text painted in white color is very easy to read: Old, working FPGA. Please notice clear, white text. Compared to examining the newer "2301A" boards, the one with temperature problems, the text is almost impossible to read, like the white paint inside the text is completely missing: Newer, failed FPGA. Is the more unclear text a sign of soldering heat damage? What's the most possible explonation: 1. The FPGA has been mounted using the wrong soldering profile with to high temperature 2. Intel has simply removed the white paint from its Altera MAX 10 chips. Nothing to worry about. 3. These are fake, chineese duplicates (and yes, these boards have been assembled in China). Please advice.2.3KViews1like14CommentsMAX 10 FPGA - 10M16SAU169A7G
Hello Intel Support Team, I am currently working on a design that includes the MAX 10 FPGA (P.NO ; 10M16SAU169A7G), and I’m having difficulty locating the PCB footprint and mechanical dimensions for this part on the Intel website. I would appreciate it if you could provide the following, PCB footprint files (in standard CAD formats) for accurate placement on the PCB. Detailed mechanical dimensions, including any recommended land patterns, ball pitch width to assist with PCB layout. Could you guide me on where to find this information, or provide it if it's not available online? Thank you for your assistance! Best Regards, Sarathi P696Views1like4Comments