Why does Quartus® Prime Pro give an error when trying to route HPS reset signals, such as s2f_rst or s2f_cold_rst, to the Fabric using the localized Sector Clock Network?

Description

Due to device architecture requirements in Altera® SoC FPGA families with a Hard Processor System (HPS), the Quartus® Prime Pro Edition Software version 25.3.1 reports a fitter routing error when you try to route certain HPS-to-FPGA reset signals to the FPGA fabric using the localized Sector Clock Network instead of the Global Clock Network.

In the Agilex® FPGA architecture, there is a device-wide Global Clock Network (meant for high fan-out signals) and a localized Sector Clock Network (meant for low fan-out, smaller regional scope, or localized logic structures). Certain signals, such as s2f_rst or s2f_cold_rst, are restricted to be only on the Global Clock Network.

For example, if you use:

set_instance_assignment -name GLOBAL_SIGNAL OFF -to ...|hps_inst|s2f_cold_rst

Quartus reports an error similar to:

Error (170084): Can't route signal "...|hps_inst|s2f_cold_rst" to atom ...

Resolution

Certain signals, such as s2f_rst or s2f_cold_rst, are restricted to be only on the Global Clock Network.

To work around this routing error in the Quartus® Prime Pro Edition Software:

1. Remove any instance assignment that sets GLOBAL_SIGNAL to OFF for HPS-to-FPGA reset outputs (for example, s2f_rst or s2f_cold_rst).
2. Recompile the design and allow Quartus to route these reset signals on the Global Clock Network.

This behavior reflects device architecture and fitter rules; it is not scheduled to be changed to allow HPS-to-FPGA reset signals on the Sector Clock Network.