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Altera_Forum
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14 years ago

Help writing Verilog code for addition - Calculator using FPGA

Hi.

I am doing a project - Calculator using FPGA board..

however, i am facing problems writing the Verilog code for addition of numbers.. the input is in ascii code, which i need to convert into binary first, then carry out the addition, and finally reconvert it back to the ascii code.. so if someone knows how to write this code or has even some little idea about how to go through with this, please help me out..

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    First I would suggest you create look up table that converts ascii to binary and back again. The addition of binary numbers will be straight forward.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Actually, I'm a novice at Verilog, so i don't really know about look up tables.. i tried googling too, but i didn't get anything worthwhile.. could you help me out with that too please??

    Thanks :)
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    I'm more of a VHDL guy but it would be something like this.

    always @(posedge clk)

    begin

    case (ascii_value)

    h'30: binary_value = h'0;

    h'31: binary_value = h'1;

    ...

    ...

    ...

    endcase

    end
  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    By nature, all digital logic quantities are binary. Decimals can be e.g. presented as binary coded decimal (BCD) numbers or 1 out of 10 decoded signal. You should specify the function of intended logic more exactly.