Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Help writing Verilog code for addition - Calculator using FPGA

Hi. I am doing a project - Calculator using FPGA board.. however, i am facing problems writing the Verilog code for addition of numbers.. the input is in ascii code, which i need to convert into...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I'm more of a VHDL guy but it would be something like this.

always @(posedge clk)

begin

case (ascii_value)

h'30: binary_value = h'0;

h'31: binary_value = h'1;

...

...

...

endcase

end