New ContributorBeginners question in multiple assignments to output
Hi everyone,
I would be interested in assigning two wire variables to a single output pin and obtain as an output signal the summation of the two signals.
A trivial example would be to use the clock signal CLK_50 and NOT(CLK_50) and send them both to the same output to obtain a constant high-level voltage corresponding to the summation (not in the Boolean sense) of the two signals.
Do you know if this possible to combine signals to outputs this way ?
Thank you
Best,
What you seem to be asking for is analog logic, summing the levels on two wires to produce an output signal that can have three discrete levels.
IE: (0,1) + (0,1) = (0,1,2)
This is not possible in digital logic FPGAs.
At best you could two outputs and resistors to simulate a simple digital to analog converter, much like some development boards support an analog VGA signal using an array of resistor values R-2R-4R-8R etc to make a simple D to A.
Can't be done internal to a device however. Not with any current Altera FPGA parts AFAIK.
