Forum Discussion
I have some questions about the process you have followed:
- What command did you use to merge the .hex with the SOF? Did you use the command found in sof_with_hps.bat supplied by Terasic?
- What command did you use to generate the JIC file from the SOF? Did you use the command found in sof_to_jic.bat supplied by Terasic?
- Your U-boot SPL comes from the hex file supplied by Terasic, in the GHRD source tree. But where does your full U-Boot software come from?
- kbrunham_altera1 month ago
New Contributor
Hello,
24.3 is very early software for Agilex 5. I would strongly recommend updating to 26.1 and then using the validated ATF and Uboot ingredients from https://github.com/altera-fpga with the label QPDS26.1_REL_GSRD_PR
- Motaz_sami1 month ago
New Contributor
I was using 26.1 but had to downgrade to 24.3 to be able to use the Terasic GHRD because any other version causes a lot of issues with it
- KianHinT_altera1 month ago
Frequent Contributor
Dear Customer,
We have not hear back from you and it has been idling for a while. We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, we will step back and allow the community to assist with any future follow-up questions.
Thank you for engaging with us!
Best regards,
Altera Technical Support
- Motaz_sami1 month ago
New Contributor
Everything I used was the standard ,that shipped with the board from terasic