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Amoon's avatar
Amoon
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1 year ago

Sopc2DTS with Agilex 7

After generating a qsys_top.sopcinfo with quartus for the SocFPGA Agilex 7 design, i'm trying to get the .dts then the .dtb from it via sopc2dts. I'm encountring the following issue: $ java -jar sop...
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ShoH_Altera's avatar
ShoH_Altera
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1 year ago

Hi @Amoon ,

Thanks for your additional inputs.
So, May I assume that you want to know how to write a kernel module that handles input signals on GPIO pins as interrupts?

Which GPIO pins are you targeting, FPGA pins or HPS dedicated GPIO pins?


  • Amoon's avatar
    Amoon
    Icon for New Contributor rankNew Contributor
    1 year ago

    hi @ShoH_Altera

    Thanks for your message.

    Yes, indeed — I am developing a kernel module that handles input signals via GPIO interrupts, primarily to simulate or test time event (TE) mechanisms. The goal is to receive rising/falling edge events on GPIO and synchronize actions accordingly.

    Currently, I am targeting HPS-dedicated GPIOs on the Agilex 7 SoC.

    This choice is based on the assumption that these pins are directly controllable and better integrated with the HPS interrupt controller.

    However, I remain open to later extending the support to FPGA-assigned GPIOs (via the GPIO bridge), once the system is stable and the correct mapping (.dts) is validated.

    • ShoH_Altera's avatar
      ShoH_Altera
      Icon for Occasional Contributor rankOccasional Contributor
      1 year ago

      Hi @Amoon ,

      Device Tree for HPS GPIO:

      In Agilex 7 HPS, the SynopsysDesignWare APB General Purpose Programming I/O (DW_apb_gpio) peripheral is used as the GPIO controller hardware, stated in Agilex 7 HPS Technical Reference Manual(TRM). So, we can use the Synopsys DesignWare APB GPIO driver for the GPIO controller.

      drivers/gpio/gpio-dwapb.c

      See this Doc file in the kernel source for information on how to write the device tree information for this device driver.

      Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml

      But there's no need to worry too much. All definitions required to use the Agilex7 HPS GPIO HW, including interrupt request functionality, are provided/contained in this .dtsi file.

      arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

      All you need to do in your device tree file is include the .dtsi file and add enable statements for the gpio node(s) you want to use, like in this example:

      arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts

      In the above .dts file, the GPIO1 node is enabed, which means that the 24 IO lines connected to the GPIO1 interface are enabled.

      &gpio1 {
       status = "okay";
      };

      You can enable the GPIO0 by by adding the same description for "&gpio0".

      That's about the device tree. Please let me know if there is anything still unclear.

      How to develop a kernel module using the GPIO driver:

      Now, you can use the standard GPIO driver APIs documented in the kernel documentation for your kernel module. For example, for v6.12 kernel:

      https://www.kernel.org/doc/html/v6.12/driver-api/gpio/index.html#

      Regarding your questions, I think you will find your solutions by referring to the sections.

      > 1.How to associate my module with the specific GPIO pin that generates the interrupt.

      https://www.kernel.org/doc/html/v6.12/driver-api/gpio/consumer.html#obtaining-and-disposing-gpios

      > 2. How to identify which GPIO pin is responsible for a particular interrupt event

      https://www.kernel.org/doc/html/v6.12/driver-api/gpio/consumer.html#using-gpios

      If you still have difficulties developing your kernel modules, please post.

      Thanks!